diff options
Diffstat (limited to 'src/mainboard/lenovo/t530')
| -rw-r--r-- | src/mainboard/lenovo/t530/variants/t530/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t530/variants/w530/devicetree.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb index 335543a8f7..190539ac1f 100644 --- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb @@ -62,7 +62,6 @@ chip northbridge/intel/sandybridge # Enable zero-based linear PCIe root port functions register "pcie_port_coalesce" = "1" register "c2_latency" = "101" # c2 not supported - register "p_cnt_throttling_supported" = "1" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb index 0a80fa1d8c..0844124f0e 100644 --- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb @@ -51,7 +51,6 @@ chip northbridge/intel/sandybridge register "gen1_dec" = "0x007c1601" register "gen2_dec" = "0x000c15e1" register "gen4_dec" = "0x000c06a1" - register "p_cnt_throttling_supported" = "1" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" register "pcie_port_coalesce" = "1" register "sata_interface_speed_support" = "0x3" |