summaryrefslogtreecommitdiff
path: root/src/mainboard/intel
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c8
-rw-r--r--src/mainboard/intel/jarrell/romstage.c4
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c4
-rw-r--r--src/mainboard/intel/truxton/romstage.c4
-rw-r--r--src/mainboard/intel/xe7501devkit/reset.c2
-rw-r--r--src/mainboard/intel/xe7501devkit/romstage.c26
6 files changed, 13 insertions, 35 deletions
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 71bda84c0f..39490fa682 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -102,10 +102,6 @@
#define RCBA_FD 0x3418 /* 32 bit */
#define RCBA_PRC 0x341C /* 32 bit */
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(u16 device, u8 address)
{
return smbus_read_byte(device, address);
@@ -119,8 +115,8 @@ static inline int spd_read_byte(u16 device, u8 address)
#include "northbridge/intel/i3100/reset_test.c"
#include "debug.c"
-void early_config(void) {
- device_t dev;
+static void early_config(void)
+{
u32 gcs, rpc, fd;
/* Enable RCBA */
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 0139f04862..d3f6c7a707 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -38,10 +38,6 @@
#define RECVENB_CONFIG 0x000a090a
#define DIMM_MAP_LOGICAL 0x0124
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index d5d00a9b03..86ac6b7bad 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -46,10 +46,6 @@
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0)
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(u16 device, u8 address)
{
return smbus_read_byte(device, address);
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 41629ef557..9d44f259ea 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -46,10 +46,6 @@
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0)
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
static inline int spd_read_byte(u16 device, u8 address)
{
return smbus_read_byte(device, address);
diff --git a/src/mainboard/intel/xe7501devkit/reset.c b/src/mainboard/intel/xe7501devkit/reset.c
index 7c8a729f5e..7abc9e5318 100644
--- a/src/mainboard/intel/xe7501devkit/reset.c
+++ b/src/mainboard/intel/xe7501devkit/reset.c
@@ -1,3 +1,5 @@
+#include <reset.h>
+
void i82801cx_hard_reset(void);
void hard_reset(void)
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 4c57de1d75..003a37f31c 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -27,11 +27,6 @@ static void hard_reset(void)
outb(0x0e, 0x0cf9);
}
-static inline void activate_spd_rom(const struct mem_controller *ctrl)
-{
- /* nothing to do */
-}
-
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);
@@ -56,31 +51,28 @@ static void main(unsigned long bist)
if (bist == 0)
{
// Skip this if there was a built in self test failure
-
early_mtrr_init();
- enable_lapic();
- }
+ enable_lapic();
+ }
// Get the serial port running and print a welcome banner
- lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
- console_init();
+ lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ uart_init();
+ console_init();
- // Halt if there was a built in self test failure
+ // Halt if there was a built in self test failure
report_bist_failure(bist);
-// print_pci_devices();
+ // print_pci_devices();
// If this is a warm boot, some initialization can be skipped
if (!bios_reset_detected())
{
enable_smbus();
-// dump_spd_registers(&memctrl[0]);
-// dump_smbus_registers();
-
-// memreset_setup(); No-op for this chipset
+ // dump_spd_registers(&memctrl[0]);
+ // dump_smbus_registers();
sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
}