diff options
Diffstat (limited to 'src/mainboard/google')
8 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index d1b6f24ca3..3637959bf2 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -77,6 +77,7 @@ config MAINBOARD_PART_NUMBER default "Redrix" if BOARD_GOOGLE_REDRIX default "Kano" if BOARD_GOOGLE_KANO default "Taeko" if BOARD_GOOGLE_TAEKO + default "Felwinter" if BOARD_GOOGLE_FELWINTER config VARIANT_DIR default "brya0" if BOARD_GOOGLE_BRYA0 @@ -85,6 +86,7 @@ config VARIANT_DIR default "redrix" if BOARD_GOOGLE_REDRIX default "kano" if BOARD_GOOGLE_KANO default "taeko" if BOARD_GOOGLE_TAEKO + default "felwinter" if BOARD_GOOGLE_FELWINTER config DIMM_SPD_SIZE int diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 657c411972..f11a998853 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -30,3 +30,7 @@ config BOARD_GOOGLE_KANO config BOARD_GOOGLE_TAEKO bool "-> Taeko" select BOARD_GOOGLE_BASEBOARD_BRYA + +config BOARD_GOOGLE_FELWINTER + bool "-> Felwinter" + select BOARD_GOOGLE_BASEBOARD_BRYA diff --git a/src/mainboard/google/brya/variants/felwinter/include/variant/ec.h b/src/mainboard/google/brya/variants/felwinter/include/variant/ec.h new file mode 100644 index 0000000000..7a2a6ff8b7 --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/felwinter/include/variant/gpio.h b/src/mainboard/google/brya/variants/felwinter/include/variant/gpio.h new file mode 100644 index 0000000000..c4fe342621 --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/felwinter/memory/Makefile.inc b/src/mainboard/google/brya/variants/felwinter/memory/Makefile.inc new file mode 100644 index 0000000000..b0ca2223a8 --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/memory/Makefile.inc @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-or-later +## This is an auto-generated file. Do not edit!! +## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder.spd.hex diff --git a/src/mainboard/google/brya/variants/felwinter/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/felwinter/memory/dram_id.generated.txt new file mode 100644 index 0000000000..fa247902ee --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brya/variants/felwinter/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/felwinter/memory/mem_parts_used.txt new file mode 100644 index 0000000000..9cff262f6d --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.inc and dram_id.generated.txt by running the +# gen_part_id tool from util/spd_tools/lp4x. +# See util/spd_tools/lp4x/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb new file mode 100644 index 0000000000..4f2c04a57a --- /dev/null +++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end |