diff options
Diffstat (limited to 'src/mainboard/google')
25 files changed, 19 insertions, 31 deletions
diff --git a/src/mainboard/google/foster/pmic.c b/src/mainboard/google/foster/pmic.c index b73983b614..8d4f855175 100644 --- a/src/mainboard/google/foster/pmic.c +++ b/src/mainboard/google/foster/pmic.c @@ -44,7 +44,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the board on any PMIC write error */ - hard_reset(); + board_reset(); } else { if (delay) udelay(500); diff --git a/src/mainboard/google/foster/reset.c b/src/mainboard/google/foster/reset.c index 1b9e9e9a36..b30e1ace91 100644 --- a/src/mainboard/google/foster/reset.c +++ b/src/mainboard/google/foster/reset.c @@ -18,7 +18,7 @@ #include <gpio.h> #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO(I5), 0); } diff --git a/src/mainboard/google/gale/Kconfig b/src/mainboard/google/gale/Kconfig index 883c9feb3b..f8def87ca2 100644 --- a/src/mainboard/google/gale/Kconfig +++ b/src/mainboard/google/gale/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_8192 select COMMON_CBFS_SPI_WRAPPER select DRIVERS_I2C_WW_RING - select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS select SPI_FLASH select SPI_FLASH_GIGADEVICE diff --git a/src/mainboard/google/gale/reset.c b/src/mainboard/google/gale/reset.c index 23d83bfdf3..d12fee0acb 100644 --- a/src/mainboard/google/gale/reset.c +++ b/src/mainboard/google/gale/reset.c @@ -19,7 +19,7 @@ #include <soc/iomap.h> #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { /* * At boot time the boot loaders would have set a magic cookie diff --git a/src/mainboard/google/nyan/pmic.c b/src/mainboard/google/nyan/pmic.c index f115586b0f..d2264591fd 100644 --- a/src/mainboard/google/nyan/pmic.c +++ b/src/mainboard/google/nyan/pmic.c @@ -61,7 +61,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - hard_reset(); + board_reset(); } else { if (do_delay) udelay(500); diff --git a/src/mainboard/google/nyan/reset.c b/src/mainboard/google/nyan/reset.c index ee36292f70..468b0c2599 100644 --- a/src/mainboard/google/nyan/reset.c +++ b/src/mainboard/google/nyan/reset.c @@ -13,11 +13,10 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO(I5), 0); } diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index 4ec0164b78..b96917e482 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -76,7 +76,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - hard_reset(); + board_reset(); } /* FIXME: this may require coordination with moving timestamps */ diff --git a/src/mainboard/google/nyan_big/pmic.c b/src/mainboard/google/nyan_big/pmic.c index 77b6545341..948d867750 100644 --- a/src/mainboard/google/nyan_big/pmic.c +++ b/src/mainboard/google/nyan_big/pmic.c @@ -61,7 +61,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - hard_reset(); + board_reset(); } else { if (do_delay) udelay(500); diff --git a/src/mainboard/google/nyan_big/reset.c b/src/mainboard/google/nyan_big/reset.c index ee36292f70..468b0c2599 100644 --- a/src/mainboard/google/nyan_big/reset.c +++ b/src/mainboard/google/nyan_big/reset.c @@ -13,11 +13,10 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO(I5), 0); } diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c index 4ec0164b78..b96917e482 100644 --- a/src/mainboard/google/nyan_big/romstage.c +++ b/src/mainboard/google/nyan_big/romstage.c @@ -76,7 +76,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - hard_reset(); + board_reset(); } /* FIXME: this may require coordination with moving timestamps */ diff --git a/src/mainboard/google/nyan_blaze/pmic.c b/src/mainboard/google/nyan_blaze/pmic.c index 77b6545341..948d867750 100644 --- a/src/mainboard/google/nyan_blaze/pmic.c +++ b/src/mainboard/google/nyan_blaze/pmic.c @@ -61,7 +61,7 @@ static void pmic_write_reg(unsigned bus, uint8_t reg, uint8_t val, int do_delay) printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the SoC on any PMIC write error */ - hard_reset(); + board_reset(); } else { if (do_delay) udelay(500); diff --git a/src/mainboard/google/nyan_blaze/reset.c b/src/mainboard/google/nyan_blaze/reset.c index ee36292f70..468b0c2599 100644 --- a/src/mainboard/google/nyan_blaze/reset.c +++ b/src/mainboard/google/nyan_blaze/reset.c @@ -13,11 +13,10 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO(I5), 0); } diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index f094e348f7..cc8f90e3da 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -80,7 +80,7 @@ static void __attribute__((noinline)) romstage(void) */ if (power_reset_status() == POWER_RESET_WATCHDOG) { printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); - hard_reset(); + board_reset(); } /* FIXME: this may require coordination with moving timestamps */ diff --git a/src/mainboard/google/purin/Kconfig b/src/mainboard/google/purin/Kconfig index f48c33c98c..4666453c4f 100644 --- a/src/mainboard/google/purin/Kconfig +++ b/src/mainboard/google/purin/Kconfig @@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_ROMSIZE_KB_2048 select COMMON_CBFS_SPI_WRAPPER - select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS select SOC_BROADCOM_CYGNUS select SPI_FLASH diff --git a/src/mainboard/google/purin/reset.c b/src/mainboard/google/purin/reset.c index 3667bbfa07..51a218703c 100644 --- a/src/mainboard/google/purin/reset.c +++ b/src/mainboard/google/purin/reset.c @@ -15,6 +15,6 @@ #include <reset.h> -void do_hard_reset(void) +void do_board_reset(void) { } diff --git a/src/mainboard/google/smaug/pmic.c b/src/mainboard/google/smaug/pmic.c index 77de277afa..75075ad6fd 100644 --- a/src/mainboard/google/smaug/pmic.c +++ b/src/mainboard/google/smaug/pmic.c @@ -47,7 +47,7 @@ static void pmic_write_reg(unsigned bus, uint8_t chip, uint8_t reg, uint8_t val, printk(BIOS_ERR, "%s: reg = 0x%02X, value = 0x%02X failed!\n", __func__, reg, val); /* Reset the board on any PMIC write error */ - hard_reset(); + board_reset(); } else { if (delay) udelay(500); diff --git a/src/mainboard/google/smaug/reset.c b/src/mainboard/google/smaug/reset.c index fc9a0b6214..121cf64bc9 100644 --- a/src/mainboard/google/smaug/reset.c +++ b/src/mainboard/google/smaug/reset.c @@ -18,7 +18,7 @@ #include "gpio.h" -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(AP_SYS_RESET_L, 0); } diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig index b8fc326db8..e6240747cc 100644 --- a/src/mainboard/google/storm/Kconfig +++ b/src/mainboard/google/storm/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_8192 select COMMON_CBFS_SPI_WRAPPER select DRIVERS_I2C_WW_RING - select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS select SPI_FLASH select SPI_FLASH_SPANSION diff --git a/src/mainboard/google/storm/reset.c b/src/mainboard/google/storm/reset.c index d8f25274b1..f598de99c5 100644 --- a/src/mainboard/google/storm/reset.c +++ b/src/mainboard/google/storm/reset.c @@ -39,7 +39,7 @@ static void wdog_reset(void) write32(APCS_WDT0_CPU0_WDOG_EXPIRED_ENABLE, 1); } -void do_hard_reset(void) +void do_board_reset(void) { wdog_reset(); } diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig index 6aef4ce915..d57c143906 100644 --- a/src/mainboard/google/veyron/Kconfig +++ b/src/mainboard/google/veyron/Kconfig @@ -36,7 +36,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOC_ROCKCHIP_RK3288 select MAINBOARD_HAS_CHROMEOS select BOARD_ROMSIZE_KB_4096 - select HAVE_HARD_RESET select SPI_FLASH select SPI_FLASH_GIGADEVICE select SPI_FLASH_WINBOND diff --git a/src/mainboard/google/veyron/reset.c b/src/mainboard/google/veyron/reset.c index a937aff65e..512ea770cd 100644 --- a/src/mainboard/google/veyron/reset.c +++ b/src/mainboard/google/veyron/reset.c @@ -13,13 +13,12 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> #include "board.h" -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO_RESET, 1); } diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig index c283f0e906..2d51962744 100644 --- a/src/mainboard/google/veyron_mickey/Kconfig +++ b/src/mainboard/google/veyron_mickey/Kconfig @@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER - select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS select SOC_ROCKCHIP_RK3288 select SPI_FLASH diff --git a/src/mainboard/google/veyron_mickey/reset.c b/src/mainboard/google/veyron_mickey/reset.c index a937aff65e..512ea770cd 100644 --- a/src/mainboard/google/veyron_mickey/reset.c +++ b/src/mainboard/google/veyron_mickey/reset.c @@ -13,13 +13,12 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> #include "board.h" -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO_RESET, 1); } diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index a8971d8fcb..520d8c04f7 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_ROMSIZE_KB_4096 select COMMON_CBFS_SPI_WRAPPER - select HAVE_HARD_RESET select MAINBOARD_HAS_CHROMEOS select SOC_ROCKCHIP_RK3288 select SPI_FLASH diff --git a/src/mainboard/google/veyron_rialto/reset.c b/src/mainboard/google/veyron_rialto/reset.c index a937aff65e..512ea770cd 100644 --- a/src/mainboard/google/veyron_rialto/reset.c +++ b/src/mainboard/google/veyron_rialto/reset.c @@ -13,13 +13,12 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <gpio.h> #include <reset.h> #include "board.h" -void do_hard_reset(void) +void do_board_reset(void) { gpio_output(GPIO_RESET, 1); } |