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Diffstat (limited to 'src/mainboard/google/brya/variants/baseboard')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/devicetree.cb4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
index 8717e70a11..33be8623f7 100644
--- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
@@ -24,6 +24,9 @@ chip soc/intel/alderlake
register "gpio_pm[COMM_4]" = "0"
register "gpio_pm[COMM_5]" = "0"
+ # Enable CNVi BT
+ register "CnviBtCore" = "true"
+
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # USB2_C2
@@ -103,7 +106,6 @@ chip soc/intel/alderlake
device ref tcss_xhci on end
device ref tcss_dma0 on end
device ref tcss_dma1 on end
- device ref cnvi_bt on end
device ref xhci on end
device ref shared_sram on end
device ref cnvi_wifi on