3 files changed, 6 insertions, 21 deletions
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index 056e0df5d1..12c7967b2c 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -59,11 +59,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
-#include "cpu/amd/microcode/microcode.c"
-
-#if CONFIG_UPDATE_CPU_MICROCODE
-#include "cpu/amd/model_10xxx/update_microcode.c"
-#endif
+#include "cpu/amd/microcode.h"
 
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
@@ -116,9 +112,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	/* Setup sysinfo defaults */
 	set_sysinfo_in_ram(0);
 
-#if CONFIG_UPDATE_CPU_MICROCODE
 	update_microcode(val);
-#endif
+
 	post_code(0x33);
 
 	cpuSetAMDMSR();
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 056e0df5d1..12c7967b2c 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -59,11 +59,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
-#include "cpu/amd/microcode/microcode.c"
-
-#if CONFIG_UPDATE_CPU_MICROCODE
-#include "cpu/amd/model_10xxx/update_microcode.c"
-#endif
+#include "cpu/amd/microcode.h"
 
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
@@ -116,9 +112,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	/* Setup sysinfo defaults */
 	set_sysinfo_in_ram(0);
 
-#if CONFIG_UPDATE_CPU_MICROCODE
 	update_microcode(val);
-#endif
+
 	post_code(0x33);
 
 	cpuSetAMDMSR();
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 431e554877..116475c1a2 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -63,11 +63,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include "cpu/amd/car/post_cache_as_ram.c"
-#include "cpu/amd/microcode/microcode.c"
-
-#if CONFIG_UPDATE_CPU_MICROCODE
-#include "cpu/amd/model_10xxx/update_microcode.c"
-#endif
+#include "cpu/amd/microcode.h"
 
 #include "cpu/amd/model_10xxx/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
@@ -119,9 +115,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	/* Setup sysinfo defaults */
 	set_sysinfo_in_ram(0);
 
-#if CONFIG_UPDATE_CPU_MICROCODE
 	update_microcode(val);
-#endif
+
 	post_code(0x33);
 
 	cpuSetAMDMSR();