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Diffstat (limited to 'src/mainboard/foxconn/d41s')
-rw-r--r--src/mainboard/foxconn/d41s/devicetree.cb2
-rw-r--r--src/mainboard/foxconn/d41s/early_init.c11
2 files changed, 2 insertions, 11 deletions
diff --git a/src/mainboard/foxconn/d41s/devicetree.cb b/src/mainboard/foxconn/d41s/devicetree.cb
index a611ee35c5..19d3e10cfb 100644
--- a/src/mainboard/foxconn/d41s/devicetree.cb
+++ b/src/mainboard/foxconn/d41s/devicetree.cb
@@ -43,6 +43,8 @@ chip northbridge/intel/pineview # Northbridge
register "sata_ports_implemented" = "0x3"
register "gpe0_en" = "0x441"
+ register "gen1_dec" = "0x00fc0a01" # Environment Controller
+
device pci 1b.0 on end # Audio
device pci 1c.0 on end # PCIe 1
device pci 1c.1 on # PCIe 2 (NIC)
diff --git a/src/mainboard/foxconn/d41s/early_init.c b/src/mainboard/foxconn/d41s/early_init.c
index 6568d96139..ab1dae14ca 100644
--- a/src/mainboard/foxconn/d41s/early_init.c
+++ b/src/mainboard/foxconn/d41s/early_init.c
@@ -26,17 +26,6 @@
void bootblock_mainboard_early_init(void)
{
- /* Disable Serial IRQ */
- pci_write_config8(PCI_DEV(0, 0x1f, 0), SERIRQ_CNTL, 0xd0);
- /* Decode range */
- pci_or_config16(PCI_DEV(0, 0x1f, 0), LPC_IO_DEC, 0x0010);
- pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN | KBC_LPC_EN
- | FDD_LPC_EN | LPT_LPC_EN | COMB_LPC_EN
- | COMA_LPC_EN);
-
- /* Environment Controller */
- pci_write_config32(PCI_DEV(0, 0x1f, 0), GEN1_DEC, 0x00fc0a01);
-
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}