summaryrefslogtreecommitdiff
path: root/src/mainboard/asus
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/asus')
-rw-r--r--src/mainboard/asus/am1i-a/bootblock.c2
-rw-r--r--src/mainboard/asus/f2a85-m/bootblock.c4
-rw-r--r--src/mainboard/asus/f2a85-m/romstage.c6
3 files changed, 4 insertions, 8 deletions
diff --git a/src/mainboard/asus/am1i-a/bootblock.c b/src/mainboard/asus/am1i-a/bootblock.c
index ddbf2aa548..2a3aabd7e9 100644
--- a/src/mainboard/asus/am1i-a/bootblock.c
+++ b/src/mainboard/asus/am1i-a/bootblock.c
@@ -113,7 +113,7 @@ static void ite_gpio_conf(pnp_devfn_t dev)
void bootblock_mainboard_early_init(void)
{
- volatile u32 i, val;
+ u32 val, i;
/* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */
pm_write8(0xea, 0x1);
diff --git a/src/mainboard/asus/f2a85-m/bootblock.c b/src/mainboard/asus/f2a85-m/bootblock.c
index 0472877dc0..3d980a663d 100644
--- a/src/mainboard/asus/f2a85-m/bootblock.c
+++ b/src/mainboard/asus/f2a85-m/bootblock.c
@@ -32,9 +32,7 @@ static void sbxxx_enable_48mhzout(void)
reg32 |= 0x00100000;
misc_write32(0x28, reg32);
- reg32 = misc_read32(0x40);
- reg32 &= ~0x80u;
- misc_write32(0x40, reg32);
+ misc_write32(0x40, misc_read32(0x40) & (~0x80u));
}
static void superio_init_m(void)
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 3aa29c8ce3..5b7494d9ee 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <amdblocks/acpimmio.h>
#include <arch/io.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/smbus.h>
@@ -26,10 +27,7 @@ void board_BeforeAgesa(struct sysinfo *cb)
post_code(0x30);
/* turn on secondary smbus at b20 */
- outb(0x28, 0xcd6);
- byte = inb(0xcd7);
- byte |= 1;
- outb(byte, 0xcd7);
+ pm_write8(0x28, pm_read8(0x28) | 1);
/* set DDR3 voltage */
byte = CONFIG_BOARD_ASUS_F2A85_M_DDR3_VOLT_VAL;