3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/amd/pistachio/fadt.c b/src/mainboard/amd/pistachio/fadt.c
index f9768b20bd..b397f52aea 100644
--- a/src/mainboard/amd/pistachio/fadt.c
+++ b/src/mainboard/amd/pistachio/fadt.c
@@ -56,7 +56,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
 	fadt->firmware_ctrl = (u32) facs;
 	fadt->dsdt = (u32) dsdt;
-	/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
+	/* 3 = Workstation, 4 = Enterprise Server, 7 = Performance Server */
 	fadt->preferred_pm_profile = 0x03;
 	fadt->sci_int = 9;
 	/* disable system management mode by setting to 0: */
@@ -85,11 +85,11 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 	pm_iowrite(0x2C, ACPI_PMA_CNT_BLK & 0xFF);
 	pm_iowrite(0x2D, ACPI_PMA_CNT_BLK >> 8);
 
-	pm_iowrite(0x0E, 1<<3 | 0<<2); /* AcpiDecodeEnable, When set, SB uses
+	pm_iowrite(0x0E, 1 << 3 | 0 << 2); /* AcpiDecodeEnable, When set, SB uses
 					* the contents of the PM registers at
 					* index 20-2B to decode ACPI I/O address.
 					* AcpiSmiEn & SmiCmdEn*/
-	pm_iowrite(0x10, 1<<1 | 1<<3| 1<<5); /* RTC_En_En, TMR_En_En, GBL_EN_EN */
+	pm_iowrite(0x10, 1 << 1 | 1 << 3| 1 << 5); /* RTC_En_En, TMR_En_En, GBL_EN_EN */
 	outl(0x1, ACPI_PM1_CNT_BLK);		  /* set SCI_EN */
 
 	fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
diff --git a/src/mainboard/amd/pistachio/mptable.c b/src/mainboard/amd/pistachio/mptable.c
index 261ac9ad4b..76ee05681f 100644
--- a/src/mainboard/amd/pistachio/mptable.c
+++ b/src/mainboard/amd/pistachio/mptable.c
@@ -69,7 +69,7 @@ static void *smp_write_config_table(void *v)
 			dword = pci_read_config32(dev, 0xac);
 			dword &= ~(7 << 26);
 			dword |= 6 << 26;	/* 0: INTA, ...., 7: INTH */
-			/* dword |= 1<<22; PIC and APIC co exists */
+			/* dword |= 1 << 22; PIC and APIC co exists */
 			pci_write_config32(dev, 0xac, dword);
 
 			/*
diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index c78f0d24a6..549ad0ceac 100644
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -112,7 +112,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	cpuid1 = cpuid(0x80000007);
 	if ((cpuid1.edx & 0x6) == 0x6) {
 		/* Read FIDVID_STATUS */
-		msr=rdmsr(0xc0010042);
+		msr = rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
 
 		enable_fid_change();
@@ -120,7 +120,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		init_fidvid_bsp(bsp_apicid);
 
 		/* show final fid and vid */
-		msr=rdmsr(0xc0010042);
+		msr = rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
 	} else {
 		printk(BIOS_DEBUG, "Changing FIDVID not supported\n");