diff options
Diffstat (limited to 'src/include')
| -rw-r--r-- | src/include/cpu/intel/cpu_ids.h | 7 | ||||
| -rw-r--r-- | src/include/device/pci_ids.h | 4 |
2 files changed, 11 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index ae58110e0e..ad66025d5f 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -83,5 +83,12 @@ #define CPUID_LUNARLAKE_A0_1 0xb06d0 #define CPUID_LUNARLAKE_A0_2 0xb06d1 #define CPUID_PANTHERLAKE_A0 0xc06c0 +#define CPUID_SNOWRIDGE_A0 0x80660 +#define CPUID_SNOWRIDGE_A1 0x80661 +#define CPUID_SNOWRIDGE_A2 0x80662 +#define CPUID_SNOWRIDGE_A3 0x80663 +#define CPUID_SNOWRIDGE_B0 0x80664 +#define CPUID_SNOWRIDGE_B1 0x80665 +#define CPUID_SNOWRIDGE_C0 0x80667 #endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 8b2de41b8b..b721bb4df6 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3232,6 +3232,7 @@ #define PCI_DID_INTEL_PTL_U_H_ESPI_29 0xe31d #define PCI_DID_INTEL_PTL_U_H_ESPI_30 0xe31e #define PCI_DID_INTEL_PTL_U_H_ESPI_31 0xe31f +#define PCI_DID_INTEL_SNR_LPC 0x18dc /* Intel PCIE device ids */ #define PCI_DID_INTEL_LPT_H_PCIE_RP1 0x8c10 @@ -4425,6 +4426,7 @@ #define PCI_DID_INTEL_PTL_U_ID_1 0xb000 #define PCI_DID_INTEL_PTL_H_ID_1 0xb001 #define PCI_DID_INTEL_PTL_H_ID_2 0xb002 +#define PCI_DID_INTEL_SNR_ID 0x09a2 /* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 @@ -4502,6 +4504,7 @@ #define PCI_DID_INTEL_PTL_H_TCSS_XHCI 0xe431 #define PCI_DID_INTEL_PTL_U_H_XHCI 0xe37d #define PCI_DID_INTEL_PTL_U_H_TCSS_XHCI 0xe331 +#define PCI_DID_INTEL_SNR_XHCI 0x18d0 /* Intel P2SB device Ids */ #define PCI_DID_INTEL_APL_P2SB 0x5a92 @@ -4534,6 +4537,7 @@ #define PCI_DID_INTEL_PTL_H_P2SB2 0xe44c #define PCI_DID_INTEL_PTL_U_H_P2SB 0xe320 #define PCI_DID_INTEL_PTL_U_H_P2SB2 0xe34c +#define PCI_DID_INTEL_SNR_P2SB 0x18dd /* Intel SRAM device Ids */ #define PCI_DID_INTEL_APL_SRAM 0x5aec |