diff options
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/romstage.h | 1 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 15 |
2 files changed, 0 insertions, 16 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index dc1b6a66b0..892a653769 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -69,7 +69,6 @@ struct romstage_params { * 30. FSP binary/FspNotify */ -void mainboard_check_ec_image(struct romstage_params *params); void mainboard_memory_init_params(struct romstage_params *params, MEMORY_INIT_UPD *memory_params); void mainboard_romstage_entry(struct romstage_params *params); diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 4bc95c94f0..d79bc2f8c0 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -146,7 +146,6 @@ void romstage_common(struct romstage_params *params) hard_reset(); } else { printk(BIOS_DEBUG, "No MRC cache found.\n"); - mainboard_check_ec_image(params); } } @@ -200,20 +199,6 @@ __attribute__((weak)) struct chipset_power_state *fill_power_state(void) return NULL; } -__attribute__((weak)) void mainboard_check_ec_image( - struct romstage_params *params) -{ -#if IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC) - struct pei_data *pei_data; - - pei_data = params->pei_data; - if (params->pei_data->boot_mode == ACPI_S0) { - /* Ensure EC is running RO firmware. */ - google_chromeec_check_ec_image(EC_IMAGE_RO); - } -#endif -} - /* Board initialization before and after RAM is enabled */ __attribute__((weak)) void mainboard_romstage_entry( struct romstage_params *params) |