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Diffstat (limited to 'src/drivers/intel/fsp2_0')
-rw-r--r--src/drivers/intel/fsp2_0/debug.c24
-rw-r--r--src/drivers/intel/fsp2_0/hand_off_block.c2
-rw-r--r--src/drivers/intel/fsp2_0/include/fsp/soc_binding.h2
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c28
-rw-r--r--src/drivers/intel/fsp2_0/silicon_init.c2
-rw-r--r--src/drivers/intel/fsp2_0/util.c2
6 files changed, 30 insertions, 30 deletions
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c
index d098772004..a2a9345474 100644
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -31,11 +31,11 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
display_mtrrs();
/* Display the UPD values */
- if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+ if (CONFIG(DISPLAY_UPD_DATA))
fspm_display_upd_values(fspm_old_upd, fspm_new_upd);
/* Display the call entry point and parameters */
- if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_SPEW, "Calling FspMemoryInit: 0x%p\n", memory_init);
printk(BIOS_SPEW, "\t0x%p: raminit_upd\n", fspm_new_upd);
@@ -44,7 +44,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
void fsp_debug_after_memory_init(uint32_t status)
{
- if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status);
if (status != FSP_SUCCESS)
@@ -55,9 +55,9 @@ void fsp_debug_after_memory_init(uint32_t status)
die("ERROR - HOB list pointer was not returned!\n");
/* Display and verify the HOBs */
- if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+ if (CONFIG(DISPLAY_HOBS))
fsp_display_hobs();
- if (IS_ENABLED(CONFIG_VERIFY_HOBS))
+ if (CONFIG(VERIFY_HOBS))
fsp_verify_memory_init_hobs();
display_mtrrs();
@@ -74,11 +74,11 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
display_mtrrs();
/* Display the UPD values */
- if (IS_ENABLED(CONFIG_DISPLAY_UPD_DATA))
+ if (CONFIG(DISPLAY_UPD_DATA))
soc_display_fsps_upd_params(fsps_old_upd, fsps_new_upd);
/* Display the call to FSP SiliconInit */
- if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_SPEW, "Calling FspSiliconInit: 0x%p\n", silicon_init);
printk(BIOS_SPEW, "\t0x%p: upd\n", fsps_new_upd);
@@ -86,11 +86,11 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
void fsp_debug_after_silicon_init(uint32_t status)
{
- if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);
/* Display the HOBs */
- if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+ if (CONFIG(DISPLAY_HOBS))
fsp_display_hobs();
display_mtrrs();
@@ -104,7 +104,7 @@ void fsp_before_debug_notify(fsp_notify_fn notify,
const struct fsp_notify_params *notify_params)
{
/* Display the call to FspNotify */
- if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (!CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
notify_params->phase);
@@ -114,11 +114,11 @@ void fsp_before_debug_notify(fsp_notify_fn notify,
void fsp_debug_after_notify(uint32_t status)
{
- if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
+ if (CONFIG(DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);
/* Display the HOBs */
- if (IS_ENABLED(CONFIG_DISPLAY_HOBS))
+ if (CONFIG(DISPLAY_HOBS))
fsp_display_hobs();
display_mtrrs();
diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c
index 86f0b266fe..5efd59058c 100644
--- a/src/drivers/intel/fsp2_0/hand_off_block.c
+++ b/src/drivers/intel/fsp2_0/hand_off_block.c
@@ -219,7 +219,7 @@ const void *fsp_find_extension_hob_by_guid(const uint8_t *guid, size_t *size)
static void display_fsp_version_info_hob(const void *hob, size_t size)
{
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_VERSION_INFO)
+#if CONFIG(DISPLAY_FSP_VERSION_INFO)
const FIRMWARE_VERSION_INFO *fvi;
const FIRMWARE_VERSION_INFO_HOB *fvih =
(FIRMWARE_VERSION_INFO_HOB *)hob;
diff --git a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
index 7d3a10210e..c7fad95aed 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
@@ -26,7 +26,7 @@
#include <Base.h>
#include <FspmUpd.h>
#include <FspsUpd.h>
-#if IS_ENABLED(CONFIG_DISPLAY_FSP_VERSION_INFO)
+#if CONFIG(DISPLAY_FSP_VERSION_INFO)
#include <FirmwareVersionInfoHob.h>
#endif
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 2002c1194e..3dafcf8ad9 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -38,7 +38,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
size_t mrc_data_size;
const void *mrc_data;
- if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) || s3wake)
+ if (!CONFIG(CACHE_MRC_SETTINGS) || s3wake)
return;
mrc_data = fsp_find_nv_storage_data(&mrc_data_size);
@@ -57,7 +57,7 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version)
mrc_data_size) < 0)
printk(BIOS_ERR, "Failed to stash MRC data\n");
- if (IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH))
+ if (CONFIG(FSP2_0_USES_TPM_MRC_HASH))
mrc_cache_update_hash(mrc_data, mrc_data_size);
}
@@ -74,7 +74,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
range_entry_size(&fsp_mem));
} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
range_entry_size(&fsp_mem))) {
- if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
+ if (CONFIG(HAVE_ACPI_RESUME)) {
printk(BIOS_ERR,
"Failed to recover CBMEM in S3 resume.\n");
/* Failed S3 resume, reset to come up cleanly */
@@ -97,8 +97,8 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
* Initialize the TPM, unless the TPM was already initialized
* in verstage and used to verify romstage.
*/
- if ((IS_ENABLED(CONFIG_TPM1) || IS_ENABLED(CONFIG_TPM2)) &&
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
+ if ((CONFIG(TPM1) || CONFIG(TPM2)) &&
+ !CONFIG(VBOOT_STARTS_IN_BOOTBLOCK))
tpm_setup(s3wake);
}
@@ -109,7 +109,7 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
arch_upd->NvsBufferPtr = NULL;
- if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS))
+ if (!CONFIG(CACHE_MRC_SETTINGS))
return;
/*
@@ -118,7 +118,7 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
* 2. Memory retrain switch is set.
*/
if (vboot_recovery_mode_enabled()) {
- if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE))
+ if (!CONFIG(HAS_RECOVERY_MRC_CACHE))
return;
if (vboot_recovery_mode_memory_retrain())
return;
@@ -128,13 +128,13 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
return;
/* Assume boot device is memory mapped. */
- assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
+ assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
data = rdev_mmap_full(&rdev);
if (data == NULL)
return;
- if (IS_ENABLED(CONFIG_FSP2_0_USES_TPM_MRC_HASH) &&
+ if (CONFIG(FSP2_0_USES_TPM_MRC_HASH) &&
!mrc_cache_verify_hash(data, region_device_sz(&rdev)))
return;
@@ -174,7 +174,7 @@ static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd,
* setting up seprate stack frame. FSP 2.1 would not relocate stack
* top and does not reinitialize stack pointer.
*/
- if (IS_ENABLED(CONFIG_FSP_USES_CB_STACK)) {
+ if (CONFIG(FSP_USES_CB_STACK)) {
arch_upd->StackBase = (void *)_car_stack_end;
arch_upd->StackSize = CONFIG_DCACHE_BSP_STACK_SIZE;
return CB_SUCCESS;
@@ -254,7 +254,7 @@ static uint32_t fsp_memory_settings_version(const struct fsp_header *hdr)
/* Use the full FSP version by default. */
uint32_t ver = hdr->fsp_revision;
- if (!IS_ENABLED(CONFIG_FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS))
+ if (!CONFIG(FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS))
return ver;
ver &= ~0xff;
@@ -298,7 +298,7 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
/* Give SoC and mainboard a chance to update the UPD */
platform_fsp_memory_init_params_cb(&fspm_upd, fsp_version);
- if (IS_ENABLED(CONFIG_MMA))
+ if (CONFIG(MMA))
setup_mma(&fspm_upd.FspmConfig);
post_code(POST_MEM_PREINIT_PREP_END);
@@ -383,7 +383,7 @@ void fsp_memory_init(bool s3wake)
struct memranges memmap;
struct range_entry freeranges[2];
- if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
+ if (CONFIG(ELOG_BOOT_COUNT) && !s3wake)
boot_count_increment();
if (cbfs_boot_locate(&file_desc, name, NULL)) {
@@ -399,7 +399,7 @@ void fsp_memory_init(bool s3wake)
_car_relocatable_data_end - _car_region_start, 0);
memranges_insert(&memmap, (uintptr_t)_program, REGION_SIZE(program), 0);
- if (!IS_ENABLED(CONFIG_FSP_M_XIP))
+ if (!CONFIG(FSP_M_XIP))
status = load_fspm_mem(&hdr, &file_data, &memmap);
else
status = load_fspm_xip(&hdr, &file_data);
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 06706639ce..402b05d55e 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -77,7 +77,7 @@ void fsps_load(bool s3wake)
if (load_done)
return;
- if (s3wake && !IS_ENABLED(CONFIG_NO_STAGE_CACHE)) {
+ if (s3wake && !CONFIG(NO_STAGE_CACHE)) {
printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n");
stage_cache_load_stage(STAGE_REFCODE, &fsps);
if (fsp_validate_component(hdr, prog_rdev(&fsps)) != CB_SUCCESS)
diff --git a/src/drivers/intel/fsp2_0/util.c b/src/drivers/intel/fsp2_0/util.c
index 5aaa17fe94..19b8127ac5 100644
--- a/src/drivers/intel/fsp2_0/util.c
+++ b/src/drivers/intel/fsp2_0/util.c
@@ -80,7 +80,7 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
rdev_munmap(rdev, membase);
- if (IS_ENABLED(CONFIG_DISPLAY_FSP_HEADER))
+ if (CONFIG(DISPLAY_FSP_HEADER))
fsp_print_header_info(hdr);
/* Check if size specified in the header matches the cbfs file size */