diff options
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intel/car/core2/cache_as_ram.S | 3 | ||||
-rw-r--r-- | src/cpu/intel/car/non-evict/cache_as_ram.S | 3 | ||||
-rw-r--r-- | src/cpu/intel/car/p3/cache_as_ram.S | 3 | ||||
-rw-r--r-- | src/cpu/intel/car/p4-netburst/cache_as_ram.S | 3 | ||||
-rw-r--r-- | src/cpu/qemu-x86/cache_as_ram_bootblock.S | 3 | ||||
-rw-r--r-- | src/cpu/x86/copy_data_section.inc | 38 |
6 files changed, 53 insertions, 0 deletions
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S index 9c60308b28..e134717b40 100644 --- a/src/cpu/intel/car/core2/cache_as_ram.S +++ b/src/cpu/intel/car/core2/cache_as_ram.S @@ -180,6 +180,9 @@ addrsize_set_high: pushl %eax /* tsc[31:0] */ #endif + /* Copy .data section content to Cache-As-Ram */ +#include <cpu/x86/copy_data_section.inc> + before_c_entry: post_code(POSTCODE_BOOTBLOCK_BEFORE_C_ENTRY) call bootblock_c_entry_bist diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S index 18ac07036e..76986ff68e 100644 --- a/src/cpu/intel/car/non-evict/cache_as_ram.S +++ b/src/cpu/intel/car/non-evict/cache_as_ram.S @@ -233,6 +233,9 @@ end_microcode_update: pushl %eax /* tsc[31:0] */ #endif + /* Copy .data section content to Cache-As-Ram */ +#include <cpu/x86/copy_data_section.inc> + before_c_entry: post_code(POSTCODE_BOOTBLOCK_BEFORE_C_ENTRY) call bootblock_c_entry_bist diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S index 779dbcca8a..623cf41e73 100644 --- a/src/cpu/intel/car/p3/cache_as_ram.S +++ b/src/cpu/intel/car/p3/cache_as_ram.S @@ -155,6 +155,9 @@ addrsize_set_high: movd %mm1, %eax pushl %eax /* tsc[31:0] */ + /* Copy .data section content to Cache-As-Ram */ +#include <cpu/x86/copy_data_section.inc> + before_c_entry: post_code(POSTCODE_BOOTBLOCK_BEFORE_C_ENTRY) call bootblock_c_entry_bist diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S index 9f514ef592..f7c023b402 100644 --- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S +++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S @@ -380,6 +380,9 @@ fill_cache: pushl %eax /* tsc[31:0] */ #endif + /* Copy .data section content to Cache-As-Ram */ +#include <cpu/x86/copy_data_section.inc> + before_c_entry: post_code(POSTCODE_BOOTBLOCK_BEFORE_C_ENTRY) call bootblock_c_entry_bist diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S index fe872debea..0943e356da 100644 --- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S +++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S @@ -100,6 +100,9 @@ pages_done: pushl %eax #endif + /* Copy .data section content to Cache-As-Ram */ +#include <cpu/x86/copy_data_section.inc> + before_c_entry: call bootblock_c_entry_bist /* Never returns */ diff --git a/src/cpu/x86/copy_data_section.inc b/src/cpu/x86/copy_data_section.inc new file mode 100644 index 0000000000..dccb8d3975 --- /dev/null +++ b/src/cpu/x86/copy_data_section.inc @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#if ENV_SEPARATE_DATA_AND_BSS + +/* + * Copy .data section content to Cache-As-Ram. + * This code can be included from 32 bits or 64 bits code. It also preserves + * registers. + */ +copy_data_section: +#if ENV_X86_64 + push %rcx + push %rdi + push %rsi +#else + pushl %ecx + pushl %edi + pushl %esi +#endif + + movl $(_edata), %ecx + movl $(_data), %edi + sub %edi, %ecx + movl $(_data_load),%esi + shrl $2, %ecx + rep movsl + +#if ENV_X86_64 + pop %rsi + pop %rdi + pop %rcx +#else + popl %esi + popl %edi + popl %ecx +#endif + +#endif /* ENV_SEPARATE_DATA_AND_BSS */ |