4 files changed, 101 insertions, 0 deletions
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index ab8e1a9919..70cce9b705 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -21,3 +21,4 @@ config CPU_QEMU_X86
 	select ARCH_RAMSTAGE_X86_32
 	select SMP
 	select UDELAY_TSC
+	select C_ENVIRONMENT_BOOTBLOCK
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc
index 288eea67f5..8ddaa81227 100644
--- a/src/cpu/qemu-x86/Makefile.inc
+++ b/src/cpu/qemu-x86/Makefile.inc
@@ -12,6 +12,8 @@
 ## GNU General Public License for more details.
 ##
 
+bootblock-y += cache_as_ram_bootblock.S
+bootblock-y += bootblock.c
 ramstage-y += qemu.c
 subdirs-y += ../x86/mtrr
 subdirs-y += ../x86/lapic
diff --git a/src/cpu/qemu-x86/bootblock.c b/src/cpu/qemu-x86/bootblock.c
new file mode 100644
index 0000000000..fd14c7e0ef
--- /dev/null
+++ b/src/cpu/qemu-x86/bootblock.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2004 Stefan Reinauer
+ * Copyright (C) 2018 Patrick Rudolph <siro@das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <cpu/x86/bist.h>
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
+
+asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist)
+{
+	post_code(0x05);
+
+	/* Halt if there was a built in self test failure */
+	if (bist) {
+		console_init();
+		report_bist_failure(bist);
+	}
+
+	/* Call lib/bootblock.c main */
+	bootblock_main_with_timestamp(base_timestamp, NULL, 0);
+}
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
new file mode 100644
index 0000000000..8e78aaaf96
--- /dev/null
+++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com>
+ * Copyright (C) 2007-2008 coresystems GmbH
+ * Copyright (C) 2018 Patrick Rudolph <siro@das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/cache.h>
+#include <cpu/x86/post_code.h>
+
+.global bootblock_pre_c_entry
+bootblock_pre_c_entry:
+
+cache_as_ram:
+	post_code(0x20)
+	/*
+	 * Nothing to do here on qemu, RAM works just fine without any
+	 * initialization.
+	 */
+
+	post_code(0x21)
+
+	movl $_car_stack_end, %esp
+	/* Align the stack and keep aligned for call to bootblock_c_entry() */
+	and	$0xfffffff0, %esp
+	sub	$12, %esp
+
+	/* Clear the cache memory region. This will also clear CAR GLOBAL */
+	movl	$_car_region_start, %esi
+	movl	%esi, %edi
+	movl	$_car_region_end, %ecx
+	sub	$_car_region_start, %ecx
+	shr	$2, %ecx
+	xorl	%eax, %eax
+	rep	stosl
+
+	/* Restore the BIST result and timestamps. */
+	movd	%mm0, %ebx
+	movd	%mm1, %eax
+	movd	%mm2, %edx
+
+	pushl	%ebx
+	pushl	%edx
+	pushl	%eax
+
+before_c_entry:
+	post_code(0x29)
+	call	bootblock_c_entry_bist
+	/* Never returns */
+.Lhlt:
+	post_code(POST_DEAD_CODE)
+	hlt
+	jmp	.Lhlt