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-rw-r--r--src/cpu/samsung/exynos5250/Kconfig9
-rw-r--r--src/cpu/samsung/exynos5420/Kconfig9
-rw-r--r--src/cpu/samsung/exynos5420/bootblock.c15
-rw-r--r--src/cpu/samsung/exynos5420/wakeup.c3
4 files changed, 36 insertions, 0 deletions
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index e0e179dd64..f937e7b21e 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -85,6 +85,15 @@ config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x00018000
+# TTB needs to be aligned to 16KB.
+config TTB_BUFFER
+ hex "memory address of the TTB buffer"
+ default 0x02058000
+
+config TTB_SIZE
+ hex "size of the TTB buffer"
+ default 0x4000
+
config SYS_SDRAM_BASE
hex
default 0x40000000
diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig
index 66679a000b..fe475ab4b3 100644
--- a/src/cpu/samsung/exynos5420/Kconfig
+++ b/src/cpu/samsung/exynos5420/Kconfig
@@ -46,6 +46,7 @@ config CBFS_ROM_OFFSET
# 0x0202_4400: variable length bootblock checksum header.
# 0x0202_4410: bootblock, assume up to 32KB in size
# 0x0203_0000: romstage, assume up to 128KB in size.
+# 0x0205_8000: TTB buffer.
# 0x0205_c000: cache for CBFS data.
# 0x0206_f000: stack bottom
# 0x0207_3000: stack pointer
@@ -110,6 +111,14 @@ config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x00013000
+config TTB_BUFFER
+ hex "memory address of the TTB buffer"
+ default 0x02058000
+
+config TTB_SIZE
+ hex "size of the TTB buffer"
+ default 0x4000
+
config SYS_SDRAM_BASE
hex
default 0x20000000
diff --git a/src/cpu/samsung/exynos5420/bootblock.c b/src/cpu/samsung/exynos5420/bootblock.c
index 5cc9ef6af2..3df51a7421 100644
--- a/src/cpu/samsung/exynos5420/bootblock.c
+++ b/src/cpu/samsung/exynos5420/bootblock.c
@@ -17,10 +17,17 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/cache.h>
+
#include "clk.h"
#include "wakeup.h"
#include "cpu.h"
+/* convenient shorthand (in MB) */
+#define SRAM_START (0x02020000 >> 20)
+#define SRAM_SIZE 1
+#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
+
void bootblock_cpu_init(void);
void bootblock_cpu_init(void)
{
@@ -51,6 +58,14 @@ void bootblock_cpu_init(void)
/* Never returns. */
}
+ /* set up dcache and MMU */
+ mmu_init();
+ mmu_config_range(0, SRAM_START, DCACHE_OFF);
+ mmu_config_range(SRAM_START, SRAM_SIZE, DCACHE_WRITEBACK);
+ mmu_config_range(SRAM_END, 4096 - SRAM_END, DCACHE_OFF);
+ dcache_invalidate_all();
+ dcache_mmu_enable();
+
/* For most ARM systems, we have to initialize firmware media source
* (ex, SPI, SD/MMC, or eMMC) now; but for Exynos platform, that is
* already handled by iROM so there's no need to setup again.
diff --git a/src/cpu/samsung/exynos5420/wakeup.c b/src/cpu/samsung/exynos5420/wakeup.c
index 5764c83bd6..af7ef73f89 100644
--- a/src/cpu/samsung/exynos5420/wakeup.c
+++ b/src/cpu/samsung/exynos5420/wakeup.c
@@ -17,6 +17,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <arch/cache.h>
#include <console/console.h>
#include "power.h"
#include "wakeup.h"
@@ -27,6 +28,8 @@ void wakeup(void)
power_reset();
power_init(); /* Ensure ps_hold_setup() for early wakeup. */
+ dcache_mmu_disable();
+ icache_invalidate_all();
power_exit_wakeup();
/* Should never return. */
die("Failed to wake up.\n");