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-rw-r--r--src/cpu/intel/model_206ax/bootblock.c3
-rw-r--r--src/cpu/intel/model_206ax/model_206ax_init.c2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c
index 493d08932c..670b09750e 100644
--- a/src/cpu/intel/model_206ax/bootblock.c
+++ b/src/cpu/intel/model_206ax/bootblock.c
@@ -24,7 +24,8 @@
#include <cpu/intel/microcode/microcode.c>
#include "model_206ax.h"
-#if CONFIG_SOUTHBRIDGE_INTEL_BD82X6X || CONFIG_SOUTHBRIDGE_INTEL_C216
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X) || \
+ IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_C216)
/* Needed for RCBA access to set Soft Reset Data register */
#include <southbridge/intel/bd82x6x/pch.h>
#else
diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c
index 2722454778..589f3b67c6 100644
--- a/src/cpu/intel/model_206ax/model_206ax_init.c
+++ b/src/cpu/intel/model_206ax/model_206ax_init.c
@@ -489,7 +489,7 @@ static void intel_cores_init(struct device *cpu)
cpu->path.apic.apic_id,
new->path.apic.apic_id);
-#if CONFIG_SMP && CONFIG_MAX_CPUS > 1
+#if IS_ENABLED(CONFIG_SMP) && CONFIG_MAX_CPUS > 1
/* Start the new CPU */
if (!start_cpu(new)) {
/* Record the error in cpu? */