diff options
Diffstat (limited to 'src/cpu/amd/agesa')
| -rw-r--r-- | src/cpu/amd/agesa/cache_as_ram.inc | 9 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family12/romstage.c | 6 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family14/romstage.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15/romstage.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15rl/romstage.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/romstage.c | 7 | ||||
| -rw-r--r-- | src/cpu/amd/agesa/family16kb/romstage.c | 7 |
7 files changed, 37 insertions, 13 deletions
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc index c0a69ec74a..b7619ff58a 100644 --- a/src/cpu/amd/agesa/cache_as_ram.inc +++ b/src/cpu/amd/agesa/cache_as_ram.inc @@ -108,19 +108,24 @@ cache_as_ram_setup: # use call far to switch to 64-bit code segment ljmp $0x18, $1f 1: + + .code64 + + call early_all_cores + /* Pass the cpu_init_detected */ cvtsd2si %xmm1, %esi /* Pass the BIST result */ cvtsd2si %xmm0, %edi - - .code64 call cache_as_ram_main .code32 #else + call early_all_cores + /* Restore the BIST result */ cvtsd2si %xmm0, %edx diff --git a/src/cpu/amd/agesa/family12/romstage.c b/src/cpu/amd/agesa/family12/romstage.c index 4fb2e685a7..67108b9093 100644 --- a/src/cpu/amd/agesa/family12/romstage.c +++ b/src/cpu/amd/agesa/family12/romstage.c @@ -35,13 +35,17 @@ #include <arch/cpu.h> #include "platform_cfg.h" +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; post_code(0x35); - amd_initmmio(); if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); diff --git a/src/cpu/amd/agesa/family14/romstage.c b/src/cpu/amd/agesa/family14/romstage.c index 16f1408a4a..1178ebb54a 100644 --- a/src/cpu/amd/agesa/family14/romstage.c +++ b/src/cpu/amd/agesa/family14/romstage.c @@ -39,13 +39,16 @@ #include <cpu/amd/car.h> #include <sb_cimx.h> +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; - amd_initmmio(); - if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); sb_Poweron_Init(); diff --git a/src/cpu/amd/agesa/family15/romstage.c b/src/cpu/amd/agesa/family15/romstage.c index fb02b4fbd0..02495b0dd7 100644 --- a/src/cpu/amd/agesa/family15/romstage.c +++ b/src/cpu/amd/agesa/family15/romstage.c @@ -30,13 +30,16 @@ #include <nb_cimx.h> #include <sb_cimx.h> +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; - post_code(0x30); - amd_initmmio(); post_code(0x31); /* Halt if there was a built in self test failure */ diff --git a/src/cpu/amd/agesa/family15rl/romstage.c b/src/cpu/amd/agesa/family15rl/romstage.c index e0a434c8f4..b6a4e514ab 100644 --- a/src/cpu/amd/agesa/family15rl/romstage.c +++ b/src/cpu/amd/agesa/family15rl/romstage.c @@ -33,13 +33,16 @@ #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; - amd_initmmio(); - if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); board_BeforeAgesa(cb); diff --git a/src/cpu/amd/agesa/family15tn/romstage.c b/src/cpu/amd/agesa/family15tn/romstage.c index fbb70adbb3..cc40b2393c 100644 --- a/src/cpu/amd/agesa/family15tn/romstage.c +++ b/src/cpu/amd/agesa/family15tn/romstage.c @@ -34,13 +34,16 @@ #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; - amd_initmmio(); - if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); diff --git a/src/cpu/amd/agesa/family16kb/romstage.c b/src/cpu/amd/agesa/family16kb/romstage.c index f1deeb9092..26b0d79ce7 100644 --- a/src/cpu/amd/agesa/family16kb/romstage.c +++ b/src/cpu/amd/agesa/family16kb/romstage.c @@ -33,13 +33,16 @@ #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> +void asmlinkage early_all_cores(void) +{ + amd_initmmio(); +} + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sysinfo *cb = NULL; u32 val; - amd_initmmio(); - if (!cpu_init_detectedx && boot_cpu()) { post_code(0x30); |