1 files changed, 30 insertions, 0 deletions
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
new file mode 100644
index 0000000000..ecaf86fde3
--- /dev/null
+++ b/src/arch/riscv/boot.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <arch/stages.h>
+#include <payload_loader.h>
+#include <console/uart.h>
+
+void arch_payload_run(const struct payload *payload)
+{
+	printk(BIOS_SPEW, "entry    = %p\n", payload->entry);
+//	uart_rx_byte(0);
+	stage_exit(payload->entry);
+}