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-rw-r--r--Documentation/mainboard/emulation/qemu-riscv.md8
-rw-r--r--Documentation/mainboard/index.md1
2 files changed, 9 insertions, 0 deletions
diff --git a/Documentation/mainboard/emulation/qemu-riscv.md b/Documentation/mainboard/emulation/qemu-riscv.md
new file mode 100644
index 0000000000..3aad816855
--- /dev/null
+++ b/Documentation/mainboard/emulation/qemu-riscv.md
@@ -0,0 +1,8 @@
+# Qemu RISC-V emulator
+
+## Building coreboot and running it in Qemu
+
+- Configure coreboot and run `make` as usual
+- Run `util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf` to
+ convert coreboot to an ELF that Qemu can load
+- Run `qemu-system-riscv64 -M virt -m 1024M -nographic -kernel build/coreboot.elf`
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index 93ee828a0a..d8d3b76fde 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -19,6 +19,7 @@ This section contains documentation about coreboot on specific mainboards.
The boards in this section are not real mainboards, but emulators.
- [Spike RISC-V emulator](emulation/spike-riscv.md)
+- [Qemu RISC-V emulator](emulation/qemu-riscv.md)
## Intel