diff options
| -rw-r--r-- | src/soc/amd/common/block/spi/Kconfig | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig index eb5412fd29..8853f6f275 100644 --- a/src/soc/amd/common/block/spi/Kconfig +++ b/src/soc/amd/common/block/spi/Kconfig @@ -17,6 +17,7 @@ config SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST config EFS_SPI_READ_MODE int range 0 7 + default 0 if EM100 default 2 help SPI read mode to be programmed by the PSP. @@ -35,6 +36,7 @@ config EFS_SPI_READ_MODE config EFS_SPI_SPEED int range 0 5 + default 3 if EM100 default 0 help SPI Fast Speed to be programmed by the PSP. @@ -56,3 +58,45 @@ config EFS_SPI_MICRON_FLAG 0: Board does not use Micron parts 1: Board always uses Micron parts 2: Micron parts are optional + +config NORMAL_READ_SPI_SPEED + int + range 0 5 + default 3 if EM100 + default 1 + help + SPI Normal Speed to be programmed by coreboot. + 0: 66.66Mhz + 1: 33.33MHz + 2: 22.22MHz + 3: 16.66MHz + 4: 100MHz + 5: 800KHz + +config ALT_SPI_SPEED + int + range 0 5 + default 3 if EM100 + default 0 + help + SPI ALT Speed to be programmed by coreboot. + 0: 66.66Mhz + 1: 33.33MHz + 2: 22.22MHz + 3: 16.66MHz + 4: 100MHz + 5: 800KHz + +config TPM_SPI_SPEED + int + range 0 5 + default 3 if EM100 + default 0 + help + SPI TPM Speed to be programmed by coreboot. + 0: 66.66Mhz + 1: 33.33MHz + 2: 22.22MHz + 3: 16.66MHz + 4: 100MHz + 5: 800KHz |