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-rw-r--r--src/soc/mediatek/mt8188/include/soc/memlayout.ld2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/mediatek/mt8188/include/soc/memlayout.ld b/src/soc/mediatek/mt8188/include/soc/memlayout.ld
index 3dc386e1f4..732b5baeb6 100644
--- a/src/soc/mediatek/mt8188/include/soc/memlayout.ld
+++ b/src/soc/mediatek/mt8188/include/soc/memlayout.ld
@@ -29,7 +29,7 @@ SECTIONS
/*
* The L3 is 2MB in total. The bootROM has configured half of the L3 cache as SRAM
- *(SRAM_L2C) so that's 1MB (and the rest to be cache, which is required so you
+ * (SRAM_L2C) so that's 1MB (and the rest to be cache, which is required so you
* can't reconfigure whole L3 as SRAM).
*/
SRAM_L2C_START(0x00200000)