6 files changed, 12 insertions, 12 deletions

diff --git a/src/soc/mediatek/mt8173/include/soc/spi.h b/src/soc/mediatek/mt8173/include/soc/spi.h
index 4a81eae5db..3cb1a01f8d 100644
--- a/src/soc/mediatek/mt8173/include/soc/spi.h
+++ b/src/soc/mediatek/mt8173/include/soc/spi.h
@@ -7,8 +7,8 @@
 
 #define SPI_BUS_NUMBER 1
 
-#define GET_SCK_REG(x) x->spi_cfg0_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg0_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)
 
 DEFINE_BITFIELD(SPI_CFG_SCK_HIGH, 7, 0)
 DEFINE_BITFIELD(SPI_CFG_SCK_LOW, 15, 8)
diff --git a/src/soc/mediatek/mt8183/include/soc/spi.h b/src/soc/mediatek/mt8183/include/soc/spi.h
index 47dee02161..48e0d55ac4 100644
--- a/src/soc/mediatek/mt8183/include/soc/spi.h
+++ b/src/soc/mediatek/mt8183/include/soc/spi.h
@@ -7,8 +7,8 @@
 
 #define SPI_BUS_NUMBER 6
 
-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)
 
 DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8186/include/soc/spi.h b/src/soc/mediatek/mt8186/include/soc/spi.h
index 2588dcc311..e70f3cd3e1 100644
--- a/src/soc/mediatek/mt8186/include/soc/spi.h
+++ b/src/soc/mediatek/mt8186/include/soc/spi.h
@@ -12,8 +12,8 @@
 
 #define SPI_BUS_NUMBER 6
 
-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)
 
 DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8188/include/soc/spi.h b/src/soc/mediatek/mt8188/include/soc/spi.h
index b1ac9ff2c6..a44ba43cec 100644
--- a/src/soc/mediatek/mt8188/include/soc/spi.h
+++ b/src/soc/mediatek/mt8188/include/soc/spi.h
@@ -13,8 +13,8 @@
 
 #define SPI_BUS_NUMBER 6
 
-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cmd_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cmd_reg)
 
 DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8192/include/soc/spi.h b/src/soc/mediatek/mt8192/include/soc/spi.h
index 28fe8390c8..e2f69554f9 100644
--- a/src/soc/mediatek/mt8192/include/soc/spi.h
+++ b/src/soc/mediatek/mt8192/include/soc/spi.h
@@ -7,8 +7,8 @@
 
 #define SPI_BUS_NUMBER 8
 
-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)
 
 DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)
diff --git a/src/soc/mediatek/mt8195/include/soc/spi.h b/src/soc/mediatek/mt8195/include/soc/spi.h
index cd872775c1..9bd69f9c2a 100644
--- a/src/soc/mediatek/mt8195/include/soc/spi.h
+++ b/src/soc/mediatek/mt8195/include/soc/spi.h
@@ -7,8 +7,8 @@
 
 #define SPI_BUS_NUMBER 6
 
-#define GET_SCK_REG(x) x->spi_cfg2_reg
-#define GET_TICK_DLY_REG(x) x->spi_cfg1_reg
+#define GET_SCK_REG(x) ((x)->spi_cfg2_reg)
+#define GET_TICK_DLY_REG(x) ((x)->spi_cfg1_reg)
 
 DEFINE_BITFIELD(SPI_CFG_CS_HOLD, 15, 0)
 DEFINE_BITFIELD(SPI_CFG_CS_SETUP, 31, 16)