diff options
| -rw-r--r-- | src/mainboard/asus/p2b/dsdt.asl | 9 | ||||
| -rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb.h | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index 15c39d2116..7160054bf1 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -17,14 +17,17 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include "southbridge/intel/i82371eb/i82371eb.h" + DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) { /* Define the main processor.*/ Scope (\_PR) { - /* Looks like the P_CNT field can't be a method or name - * and has to be hardcoded to 0xe410 or generated in SSDT */ - Processor (CPU0, 0x01, 0xe410, 0x06) {} + /* Looks like the P_CNT field can't be a name or method (except + * builtins like Add()) and has to be hardcoded or generated + * into SSDT */ + Processor (CPU0, 0x01, Add(DEFAULT_PMBASE, PCNTRL), 0x06) {} } /* For now only define 2 power states: diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index a77a8e68aa..2fcad8d6ee 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -23,6 +23,7 @@ #if !defined(ASSEMBLY) #if !defined(__PRE_RAM__) +#if !defined(__ACPI__) /* dsdt include */ #include <arch/io.h> #include <device/device.h> @@ -33,6 +34,7 @@ void i82371eb_hard_reset(void); #endif #endif +#endif /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the * 'reg' variable, otherwise it clears those bits. |