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-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params_tgl.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
index 388ac42649..a4533c9e6c 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c
@@ -60,12 +60,15 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
m_cfg->PcieClkSrcUsage[i] = 0xff;
}
+ memcpy(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq,
+ sizeof(config->PcieClkSrcClkReq));
+
m_cfg->PrmrrSize = config->PrmrrSize;
m_cfg->EnableC6Dram = config->enable_c6dram;
/* Disable BIOS Guard */
m_cfg->BiosGuard = 0;
- /* UART Debug Log*/
+ /* UART Debug Log */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
DEBUG_INTERFACE_UART : DEBUG_INTERFACE_TRACEHUB;
m_cfg->PcdIsaSerialUartBase = 0x0;