diff options
| -rw-r--r-- | src/mainboard/asrock/b85m_pro4/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/asrock/h81m-hds/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/beltino/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/google/slippy/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/baskingridge/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t440p/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x10slm-f/romstage.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/romstage.c | 1 |
8 files changed, 1 insertions, 7 deletions
diff --git a/src/mainboard/asrock/b85m_pro4/romstage.c b/src/mainboard/asrock/b85m_pro4/romstage.c index 3a3b087706..c9c12df131 100644 --- a/src/mainboard/asrock/b85m_pro4/romstage.c +++ b/src/mainboard/asrock/b85m_pro4/romstage.c @@ -30,7 +30,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; pei_data->gbe_enable = 1; - pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ diff --git a/src/mainboard/asrock/h81m-hds/romstage.c b/src/mainboard/asrock/h81m-hds/romstage.c index 16f7d0d1cf..6847ff24f4 100644 --- a/src/mainboard/asrock/h81m-hds/romstage.c +++ b/src/mainboard/asrock/h81m-hds/romstage.c @@ -27,7 +27,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[0] = 0xa0; pei_data->spd_addresses[2] = 0xa4; pei_data->ec_present = 0; - pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ diff --git a/src/mainboard/google/beltino/romstage.c b/src/mainboard/google/beltino/romstage.c index fe3275e9d9..525edf467f 100644 --- a/src/mainboard/google/beltino/romstage.c +++ b/src/mainboard/google/beltino/romstage.c @@ -51,7 +51,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) /* Enable 2x refresh mode */ pei_data->ddr_refresh_2x = 1; pei_data->dq_pins_interleaved = 1; - pei_data->max_ddr3_freq = 1600; pei_data->usb_xhci_on_resume = 1; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c index ea95853663..614543241e 100644 --- a/src/mainboard/google/slippy/romstage.c +++ b/src/mainboard/google/slippy/romstage.c @@ -48,7 +48,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[0] = 0xff; pei_data->spd_addresses[2] = 0xff; pei_data->ec_present = 1; - pei_data->max_ddr3_freq = 1600; pei_data->usb_xhci_on_resume = 1; variant_romstage_entry(pei_data); diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c index a156095bef..6b2dfa78f3 100644 --- a/src/mainboard/intel/baskingridge/romstage.c +++ b/src/mainboard/intel/baskingridge/romstage.c @@ -52,7 +52,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[2] = 0xa4; pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; - pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ diff --git a/src/mainboard/lenovo/t440p/romstage.c b/src/mainboard/lenovo/t440p/romstage.c index 53088d6826..23a12aabb7 100644 --- a/src/mainboard/lenovo/t440p/romstage.c +++ b/src/mainboard/lenovo/t440p/romstage.c @@ -50,7 +50,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[2] = 0xa2; pei_data->ec_present = 1; pei_data->gbe_enable = 1; - pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ diff --git a/src/mainboard/supermicro/x10slm-f/romstage.c b/src/mainboard/supermicro/x10slm-f/romstage.c index ce8f888d13..09e8df1a6f 100644 --- a/src/mainboard/supermicro/x10slm-f/romstage.c +++ b/src/mainboard/supermicro/x10slm-f/romstage.c @@ -29,7 +29,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data) pei_data->spd_addresses[3] = 0xa6; pei_data->ec_present = 0; pei_data->ddr_refresh_2x = 1; - pei_data->max_ddr3_freq = 1600; struct usb2_port_setting usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c index 7c27827921..ca948132b3 100644 --- a/src/northbridge/intel/haswell/romstage.c +++ b/src/northbridge/intel/haswell/romstage.c @@ -52,6 +52,7 @@ void mainboard_romstage_entry(void) .gpiobase = DEFAULT_GPIOBASE, .temp_mmio_base = 0xfed08000, .tseg_size = CONFIG_SMM_TSEG_SIZE, + .max_ddr3_freq = 1600, }; mainboard_fill_pei_data(&pei_data); |