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-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c7
-rw-r--r--src/soc/intel/apollolake/include/soc/mmap_boot.h22
-rw-r--r--src/soc/intel/apollolake/mmap_boot.c12
3 files changed, 34 insertions, 7 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index deec368129..431dd73bff 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -22,6 +22,7 @@
#include <soc/iomap.h>
#include <soc/cpu.h>
#include <soc/gpio.h>
+#include <soc/mmap_boot.h>
#include <soc/northbridge.h>
#include <soc/pci_devs.h>
#include <soc/uart.h>
@@ -87,7 +88,8 @@ void asmlinkage bootblock_c_entry(uint64_t base_timestamp)
static void cache_bios_region(void)
{
int mtrr;
- uint32_t rom_size, alignment;
+ size_t rom_size;
+ uint32_t alignment;
mtrr = get_free_var_mtrr();
@@ -95,7 +97,8 @@ static void cache_bios_region(void)
return;
/* Only the IFD BIOS region is memory mapped (at top of 4G) */
- rom_size = CONFIG_IFD_BIOS_END - CONFIG_IFD_BIOS_START;
+ rom_size = get_bios_size();
+
/* Round to power of two */
alignment = 1 << (log2_ceil(rom_size));
rom_size = ALIGN_UP(rom_size, alignment);
diff --git a/src/soc/intel/apollolake/include/soc/mmap_boot.h b/src/soc/intel/apollolake/include/soc/mmap_boot.h
new file mode 100644
index 0000000000..80f25a9147
--- /dev/null
+++ b/src/soc/intel/apollolake/include/soc/mmap_boot.h
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_APOLLOLAKE_MMAP_BOOT_H__
+#define __SOC_APOLLOLAKE_MMAP_BOOT_H__
+
+size_t get_bios_size(void);
+
+#endif /* __SOC_APOLLOLAKE_MMAP_BOOT_H__ */
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
index d3c39ec393..d434cfacda 100644
--- a/src/soc/intel/apollolake/mmap_boot.c
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -23,6 +23,7 @@
#include <console/console.h>
#include <fmap.h>
#include <soc/intel/common/nvm.h>
+#include <soc/mmap_boot.h>
#include <soc/spi.h>
/*
@@ -87,11 +88,6 @@ static void bios_mmap_init(void)
SPIBAR_BFPREG_PRL_SHIFT) + 1) * 4 * KiB;
size = bios_end - start;
- printk(BIOS_INFO, "IFD BIOS region info loaded from FLREG%d\n",
- (val & SPIBAR_BFPREG_SBRS) ? 6 : 1);
- printk(BIOS_INFO, "IFD BIOS Start: 0x%zx\n", start);
- printk(BIOS_INFO, "IFD BIOS End : 0x%zx\n", bios_end);
-
/* BIOS region is mapped right below 4G. */
base = 4ULL * GiB - size;
@@ -167,3 +163,9 @@ uint32_t nvm_mmio_to_flash_offset(void *p)
*/
return (uintptr_t)p - (4ULL * GiB - size) + start;
}
+
+size_t get_bios_size(void)
+{
+ bios_mmap_init();
+ return car_get_var(bios_size);
+}