diff options
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 19 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/pcie_rp.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 19 |
3 files changed, 25 insertions, 14 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 2260259753..4c8865c090 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -484,18 +484,23 @@ static int get_l1_substate_control(enum L1_substates_control ctl) } /* + * Chip config parameter pcie_rp_aspm uses (UPD value + 1) because + * a UPD value of 0 for pcie_rp_aspm means disabled. In order to ensure + * that the mainboard setting does not disable ASPM incorrectly, chip + * config parameter values are offset by 1 with 0 meaning use FSP UPD default. * get_aspm_control() ensures that the right UPD value is set in fsp_params. - * 0: Disable ASPM - * 1: L0s only - * 2: L1 only - * 3: L0s and L1 - * 4: Auto configuration + * 0: Use FSP UPD default + * 1: Disable ASPM + * 2: L0s only + * 3: L1 only + * 4: L0s and L1 + * 5: Auto configuration */ static unsigned int get_aspm_control(enum ASPM_control ctl) { - if (ctl > ASPM_AUTO) + if ((ctl > ASPM_AUTO) || (ctl == ASPM_DEFAULT)) ctl = ASPM_AUTO; - return ctl; + return ctl - 1; } /* This function returns the VccIn Aux Imon IccMax values for ADL and RPL diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h index be7c5f93f8..dff4d97382 100644 --- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h +++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h @@ -47,6 +47,7 @@ enum L1_substates_control { /* This enum is for passing into an FSP UPD, typically ASPM */ enum ASPM_control { + ASPM_DEFAULT, ASPM_DISABLE, ASPM_L0S, ASPM_L1, diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 58d4cda8fe..7a2a9d8b48 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -312,18 +312,23 @@ static int get_l1_substate_control(enum L1_substates_control ctl) } /* + * Chip config parameter pcie_rp_aspm uses (UPD value + 1) because + * a UPD value of 0 for pcie_rp_aspm means disabled. In order to ensure + * that the mainboard setting does not disable ASPM incorrectly, chip + * config parameter values are offset by 1 with 0 meaning use FSP UPD default. * get_aspm_control() ensures that the right UPD value is set in fsp_params. - * 0: Disable ASPM - * 1: L0s only - * 2: L1 only - * 3: L0s and L1 - * 4: Auto configuration + * 0: Use FSP UPD default + * 1: Disable ASPM + * 2: L0s only + * 3: L1 only + * 4: L0s and L1 + * 5: Auto configuration */ static unsigned int get_aspm_control(enum ASPM_control ctl) { - if (ctl > ASPM_AUTO) + if ((ctl > ASPM_AUTO) || (ctl == ASPM_DEFAULT)) ctl = ASPM_AUTO; - return ctl; + return ctl - 1; } __weak void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *config) |