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| -rw-r--r-- | src/soc/sifive/fu540/soc.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/sifive/fu540/soc.c b/src/soc/sifive/fu540/soc.c new file mode 100644 index 0000000000..9405755e37 --- /dev/null +++ b/src/soc/sifive/fu540/soc.c @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Philipp Hug <philipp@hug.cx> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +static void soc_enable(struct device *dev) +{ + ram_resource(dev, 0, (uintptr_t)_dram/KiB, + sdram_size_mb()*KiB); +} |