diff options
| -rw-r--r-- | src/include/device/pci_ids.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/chipset.cb | 2 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/include/soc/pci_devs.h | 4 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/xhci.c | 39 |
4 files changed, 34 insertions, 12 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 042e10efef..43dbe5bafa 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -599,6 +599,7 @@ #define PCI_DEVICE_ID_AMD_FAM17H_MODEL60H_XHCI 0x1639 #define PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI0 0x1503 #define PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI1 0x1504 +#define PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI2 0x1505 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF0 0x15E8 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF1 0x15E9 #define PCI_DEVICE_ID_AMD_FAM17H_MODEL18H_DF2 0x15EA diff --git a/src/soc/amd/sabrina/chipset.cb b/src/soc/amd/sabrina/chipset.cb index c477a17d3d..bd5a60daab 100644 --- a/src/soc/amd/sabrina/chipset.cb +++ b/src/soc/amd/sabrina/chipset.cb @@ -64,7 +64,7 @@ chip soc/amd/sabrina end device pci 08.2 alias gpp_bridge_b off end # Internal GPP Bridge 1 to Bus B device pci 08.3 alias gpp_bridge_c off # Internal GPP Bridge 2 to Bus C - device pci 0.0 alias dummy_function_c off end # PCIe Dummy Function + device pci 0.0 alias xhci_2 off end # Might also be a dummy device with different PCI DID end device pci 14.0 alias smbus on end # primary FCH function diff --git a/src/soc/amd/sabrina/include/soc/pci_devs.h b/src/soc/amd/sabrina/include/soc/pci_devs.h index 52ecbd624b..53e4f1a910 100644 --- a/src/soc/amd/sabrina/include/soc/pci_devs.h +++ b/src/soc/amd/sabrina/include/soc/pci_devs.h @@ -87,6 +87,10 @@ #define PCIE_GPP_C_DEVFN PCI_DEVFN(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) #define SOC_PCIE_GPP_C_DEV _SOC_DEV(PCIE_ABC_BRIDGE_DEV, PCIE_ABC_C_FUNC) +#define XHCI2_DEV 0x0 +#define XHCI2_FUNC 0 +#define XHCI2_DEVFN PCI_DEVFN(XHCI2_DEV, XHCI2_FUNC) + /* SMBUS */ #define SMBUS_DEV 0x14 #define SMBUS_FUNC 0 diff --git a/src/soc/amd/sabrina/xhci.c b/src/soc/amd/sabrina/xhci.c index c95b5f91e3..c6c0545cc9 100644 --- a/src/soc/amd/sabrina/xhci.c +++ b/src/soc/amd/sabrina/xhci.c @@ -6,6 +6,7 @@ #include <amdblocks/smi.h> #include <bootstate.h> #include <device/device.h> +#include <device/pci_ids.h> #include <drivers/usb/pci_xhci/pci_xhci.h> #include <soc/pci_devs.h> #include <soc/smi.h> @@ -22,6 +23,12 @@ static const struct sci_source xhci_sci_sources[] = { .gpe = GEVENT_31, .direction = SMI_SCI_LVL_HIGH, .level = SMI_SCI_EDG + }, + { + .scimap = SMITYPE_XHC2_PME, + .gpe = GEVENT_31, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG } }; @@ -30,25 +37,35 @@ enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe) if (dev->bus->dev->path.type != DEVICE_PATH_PCI) return CB_ERR_ARG; - if (dev->bus->dev->path.pci.devfn != PCIE_ABC_A_DEVFN) - return CB_ERR_ARG; - if (dev->path.type != DEVICE_PATH_PCI) return CB_ERR_ARG; - if (dev->path.pci.devfn == XHCI0_DEVFN) - *gpe = xhci_sci_sources[0].gpe; - else if (dev->path.pci.devfn == XHCI1_DEVFN) - *gpe = xhci_sci_sources[1].gpe; - else - return CB_ERR_ARG; + if (dev->bus->dev->path.pci.devfn == PCIE_ABC_A_DEVFN) { + if (dev->path.pci.devfn == XHCI0_DEVFN) { + *gpe = xhci_sci_sources[0].gpe; + return CB_SUCCESS; + } else if (dev->path.pci.devfn == XHCI1_DEVFN) { + *gpe = xhci_sci_sources[1].gpe; + return CB_SUCCESS; + } + } else if (dev->bus->dev->path.pci.devfn == PCIE_GPP_C_DEVFN) { + if (dev->path.pci.devfn == XHCI2_DEVFN + && dev->device == PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI2) { + *gpe = xhci_sci_sources[2].gpe; + return CB_SUCCESS; + } + } - return CB_SUCCESS; + return CB_ERR_ARG; } static void configure_xhci_sci(void *unused) { - gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources)); + const struct device *xhci_2 = DEV_PTR(xhci_2); + if (xhci_2->device == PCI_DEVICE_ID_AMD_FAM17H_MODELA0H_XHCI2) + gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources)); + else + gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources) - 1); } BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL); |