diff options
| -rw-r--r-- | src/soc/amd/common/block/pm/pmlib.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/src/soc/amd/common/block/pm/pmlib.c b/src/soc/amd/common/block/pm/pmlib.c index 9cb9d528b9..f1b0b27d6a 100644 --- a/src/soc/amd/common/block/pm/pmlib.c +++ b/src/soc/amd/common/block/pm/pmlib.c @@ -5,17 +5,17 @@ #include <console/console.h> #include <types.h> +/* This register is a bit of an odd one. The configuration gets written into the lower nibble, + but ends up being copied to the upper nibble which gets initialized by this. */ #define PM_RTC_SHADOW_REG 0x5b -/* Init bit to be set by BIOS while configuring the PWR_FAIL_* shadow bits. */ -#define PWR_FAIL_INIT BIT(2) -#define PWR_FAIL_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) +#define PWR_PWRSTATE BIT(2) /* power state bit; needs to be written as 1 */ #define PWR_FAIL_OFF 0x0 /* Always power off after power resumes */ #define PWR_FAIL_ON 0x1 /* Always power on after power resumes */ #define PWR_FAIL_PREV 0x3 /* Use previous setting after power resumes */ void pm_set_power_failure_state(void) { - uint8_t val, pwr_fail = PWR_FAIL_INIT; + uint8_t pwr_fail = PWR_PWRSTATE; switch (CONFIG_MAINBOARD_POWER_FAILURE_STATE) { case MAINBOARD_POWER_STATE_OFF: @@ -37,7 +37,5 @@ void pm_set_power_failure_state(void) break; } - val = pm_io_read8(PM_RTC_SHADOW_REG) & ~PWR_FAIL_MASK; - val |= pwr_fail; - pm_io_write8(PM_RTC_SHADOW_REG, val); + pm_io_write8(PM_RTC_SHADOW_REG, pwr_fail); } |