diff options
55 files changed, 25 insertions, 122 deletions
diff --git a/src/mainboard/a-trend/atc-6220/romstage.c b/src/mainboard/a-trend/atc-6220/romstage.c index cf44109e06..327a13ca52 100644 --- a/src/mainboard/a-trend/atc-6220/romstage.c +++ b/src/mainboard/a-trend/atc-6220/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/a-trend/atc-6240/romstage.c b/src/mainboard/a-trend/atc-6240/romstage.c index cddaffb41c..a15dc4be98 100644 --- a/src/mainboard/a-trend/atc-6240/romstage.c +++ b/src/mainboard/a-trend/atc-6240/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83627HF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/abit/be6-ii_v2_0/romstage.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c index 101b1f06fb..4b05e63cf0 100644 --- a/src/mainboard/abit/be6-ii_v2_0/romstage.c +++ b/src/mainboard/abit/be6-ii_v2_0/romstage.c @@ -38,9 +38,6 @@ /* FIXME: It's a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 9079044919..1157b00832 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8718f/it8718f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 5c7858c19b..ddb5076c12 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8718f/it8718f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index 540ada6432..c18b58b87b 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8712f/it8712f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 540ada6432..c18b58b87b 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8712f/it8712f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/asus/mew-am/romstage.c b/src/mainboard/asus/mew-am/romstage.c index aad5ed3852..ea28d56843 100644 --- a/src/mainboard/asus/mew-am/romstage.c +++ b/src/mainboard/asus/mew-am/romstage.c @@ -34,9 +34,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/asus/mew-vm/romstage.c b/src/mainboard/asus/mew-vm/romstage.c index 87aca12f5d..60ae774155 100644 --- a/src/mainboard/asus/mew-vm/romstage.c +++ b/src/mainboard/asus/mew-vm/romstage.c @@ -34,9 +34,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/asus/p2b-d/romstage.c b/src/mainboard/asus/p2b-d/romstage.c index a4abad4d09..ae09d8b8af 100644 --- a/src/mainboard/asus/p2b-d/romstage.c +++ b/src/mainboard/asus/p2b-d/romstage.c @@ -37,9 +37,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/asus/p2b-ds/romstage.c b/src/mainboard/asus/p2b-ds/romstage.c index 31f0971847..40038b57e8 100644 --- a/src/mainboard/asus/p2b-ds/romstage.c +++ b/src/mainboard/asus/p2b-ds/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/asus/p2b-f/romstage.c b/src/mainboard/asus/p2b-f/romstage.c index 41926d0bd3..658ac408ec 100644 --- a/src/mainboard/asus/p2b-f/romstage.c +++ b/src/mainboard/asus/p2b-f/romstage.c @@ -38,9 +38,6 @@ /* FIXME: The ASUS P2B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/asus/p2b-ls/romstage.c b/src/mainboard/asus/p2b-ls/romstage.c index b480aa55c2..0bf4172e5a 100644 --- a/src/mainboard/asus/p2b-ls/romstage.c +++ b/src/mainboard/asus/p2b-ls/romstage.c @@ -38,9 +38,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/asus/p2b/romstage.c b/src/mainboard/asus/p2b/romstage.c index cf44109e06..327a13ca52 100644 --- a/src/mainboard/asus/p2b/romstage.c +++ b/src/mainboard/asus/p2b/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/asus/p3b-f/romstage.c b/src/mainboard/asus/p3b-f/romstage.c index 04fa6a73c3..97600fae65 100644 --- a/src/mainboard/asus/p3b-f/romstage.c +++ b/src/mainboard/asus/p3b-f/romstage.c @@ -35,10 +35,6 @@ #include "superio/winbond/w83977tf/w83977tf_early_serial.c" #include <lib.h> -void enable_pm(void); -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) diff --git a/src/mainboard/azza/pt-6ibd/romstage.c b/src/mainboard/azza/pt-6ibd/romstage.c index 9d97c87dfc..957a5f7eb4 100644 --- a/src/mainboard/azza/pt-6ibd/romstage.c +++ b/src/mainboard/azza/pt-6ibd/romstage.c @@ -38,9 +38,6 @@ /* FIXME: It's a Winbond W83977EF, actually. */ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/biostar/m6tba/romstage.c b/src/mainboard/biostar/m6tba/romstage.c index d341e4c8b5..697d554076 100644 --- a/src/mainboard/biostar/m6tba/romstage.c +++ b/src/mainboard/biostar/m6tba/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c index 0f317809b7..718c096976 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c +++ b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c @@ -38,9 +38,6 @@ /* FIXME: This should be PC97307 (but it's buggy at the moment)! */ #define SERIAL_DEV PNP_DEV(0x15c, PC97317_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c index a3c1f20af0..4e12777e64 100644 --- a/src/mainboard/ecs/p6iwp-fe/romstage.c +++ b/src/mainboard/ecs/p6iwp-fe/romstage.c @@ -33,9 +33,6 @@ #include "superio/ite/it8712f/it8712f_early_serial.c" #include <lib.h> -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { it8712f_24mhz_clkin(); diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index c875330999..affc36a542 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -35,8 +35,6 @@ #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" -void enable_smbus(void); - void setup_ich7_gpios(void) { u32 gpios; diff --git a/src/mainboard/gigabyte/ga-6bxc/romstage.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c index 17bf59d03a..f4ed6fa89d 100644 --- a/src/mainboard/gigabyte/ga-6bxc/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxc/romstage.c @@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void); #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/gigabyte/ga-6bxe/romstage.c b/src/mainboard/gigabyte/ga-6bxe/romstage.c index b93b87f0e7..31af09e62c 100644 --- a/src/mainboard/gigabyte/ga-6bxe/romstage.c +++ b/src/mainboard/gigabyte/ga-6bxe/romstage.c @@ -38,9 +38,6 @@ static void it8671f_48mhz_clkin(void); #define SERIAL_DEV PNP_DEV(0x3f0, IT8671F_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 1f6ebdd1aa..8daa2b1dcd 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -38,7 +38,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8718f/it8718f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c index 21f80c2567..bbf1f58a70 100644 --- a/src/mainboard/gigabyte/ma78gm/romstage.c +++ b/src/mainboard/gigabyte/ma78gm/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/ite/it8718f/it8718f_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/hp/e_vectra_p2706t/romstage.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c index 776b841b6b..1ecc686ddb 100644 --- a/src/mainboard/hp/e_vectra_p2706t/romstage.c +++ b/src/mainboard/hp/e_vectra_p2706t/romstage.c @@ -38,9 +38,6 @@ /* TODO: It's a PC87364 actually! */ #define SERIAL_DEV PNP_DEV(0x2e, PC87360_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { /* TODO: It's a PC87364 actually! */ diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index 9902630122..f85fa16af5 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -40,8 +40,6 @@ #define SERIAL_DEV PNP_DEV(0x4e, W83627EHG_SP1) #define DUMMY_DEV PNP_DEV(0x4e, 0) -void enable_smbus(void); - void setup_ich7_gpios(void) { printk(BIOS_DEBUG, " GPIOS..."); diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index 8ef205aab7..86da8f6c87 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -42,7 +42,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/fintek/f71859/f71859_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/intel/d810e2cb/romstage.c b/src/mainboard/intel/d810e2cb/romstage.c index fcdbb3156e..81e2d5d348 100644 --- a/src/mainboard/intel/d810e2cb/romstage.c +++ b/src/mainboard/intel/d810e2cb/romstage.c @@ -35,9 +35,6 @@ #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { /* Set southbridge and Super I/O GPIOs. */ diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 8b79f2dc57..8b02163ab8 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -39,8 +39,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1) -void enable_smbus(void); - void setup_ich7_gpios(void) { /* TODO: This is highly board specific and should be moved */ diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index a1688dfcb7..4711aecfdd 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -43,7 +43,6 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include <console/loglevel.h> #include "cpu/x86/bist.h" -static int smbus_read_byte(u32 device, u32 address); #include "superio/fintek/f71863fg/f71863fg_early_serial.c" #include <usbdebug.h> #include "cpu/x86/mtrr/earlymtrr.c" diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 59d54d260f..bd42f5f68e 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -34,7 +34,6 @@ #include <console/console.h> #include <cpu/x86/bist.h> #include "superio/winbond/w83627thg/w83627thg_early_serial.c" -void enable_smbus(void); #include "northbridge/intel/i945/i945.h" #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" diff --git a/src/mainboard/mitac/6513wu/romstage.c b/src/mainboard/mitac/6513wu/romstage.c index a46e5673f8..d0cdc178be 100644 --- a/src/mainboard/mitac/6513wu/romstage.c +++ b/src/mainboard/mitac/6513wu/romstage.c @@ -35,9 +35,6 @@ #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/msi/ms6119/romstage.c b/src/mainboard/msi/ms6119/romstage.c index 23b727733e..950c838ebc 100644 --- a/src/mainboard/msi/ms6119/romstage.c +++ b/src/mainboard/msi/ms6119/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/msi/ms6147/romstage.c b/src/mainboard/msi/ms6147/romstage.c index 2740abb7a8..b3b40b21f1 100644 --- a/src/mainboard/msi/ms6147/romstage.c +++ b/src/mainboard/msi/ms6147/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/msi/ms6156/romstage.c b/src/mainboard/msi/ms6156/romstage.c index 630f313b1b..04b25208b2 100644 --- a/src/mainboard/msi/ms6156/romstage.c +++ b/src/mainboard/msi/ms6156/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/msi/ms6178/romstage.c b/src/mainboard/msi/ms6178/romstage.c index 19d4c81488..dd3a5226a8 100644 --- a/src/mainboard/msi/ms6178/romstage.c +++ b/src/mainboard/msi/ms6178/romstage.c @@ -35,9 +35,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define DUMMY_DEV PNP_DEV(0x2e, 0) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { w83627hf_set_clksel_48(DUMMY_DEV); diff --git a/src/mainboard/nec/powermate2000/romstage.c b/src/mainboard/nec/powermate2000/romstage.c index 0444b08d5c..95fa3b20ec 100644 --- a/src/mainboard/nec/powermate2000/romstage.c +++ b/src/mainboard/nec/powermate2000/romstage.c @@ -34,9 +34,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - void main(unsigned long bist) { smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); diff --git a/src/mainboard/nokia/ip530/romstage.c b/src/mainboard/nokia/ip530/romstage.c index fdffbf9d06..b3f29de016 100644 --- a/src/mainboard/nokia/ip530/romstage.c +++ b/src/mainboard/nokia/ip530/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x3f0, SMSCSUPERIO_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 109d2e8102..85d163baf8 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -37,8 +37,6 @@ #include "northbridge/intel/i945/raminit.h" #include "southbridge/intel/i82801gx/i82801gx.h" -void enable_smbus(void); - void setup_ich7_gpios(void) { printk(BIOS_DEBUG, " GPIOS..."); diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c index 99eb7b6b71..de87edb451 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c +++ b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c @@ -37,9 +37,6 @@ void it8671f_48mhz_clkin(void); #define SERIAL_DEV PNP_DEV(0x370, IT8671F_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/mainboard/tyan/s1846/romstage.c b/src/mainboard/tyan/s1846/romstage.c index 8cb436be0f..fb48f0702e 100644 --- a/src/mainboard/tyan/s1846/romstage.c +++ b/src/mainboard/tyan/s1846/romstage.c @@ -36,9 +36,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1) -void enable_smbus(void); -int smbus_read_byte(u8 device, u8 address); - int spd_read_byte(unsigned int device, unsigned int address) { return smbus_read_byte(device, address); diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 477c4a559d..bd11140544 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -337,9 +337,6 @@ int i945_silicon_revision(void); void i945_early_initialization(void); void i945_late_initialization(void); -/* provided by southbridge code */ -int smbus_read_byte(unsigned device, unsigned address); - /* provided by mainboard code */ void setup_ich7_gpios(void); diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h index 2fcad8d6ee..709b8327a8 100644 --- a/src/southbridge/intel/i82371eb/i82371eb.h +++ b/src/southbridge/intel/i82371eb/i82371eb.h @@ -36,6 +36,12 @@ void i82371eb_hard_reset(void); #endif #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); +void enable_pm(void); +#endif + /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the * 'reg' variable, otherwise it clears those bits. * diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c index 66c2712b7b..5e52985428 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_pm.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_pm.c @@ -26,8 +26,6 @@ #include <console/console.h> #include "i82371eb.h" -void enable_pm(void); - void enable_pm(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c index b7c79075eb..8505762933 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c @@ -27,8 +27,6 @@ #include "i82371eb.h" #include "i82371eb_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82371eb/i82371eb_smbus.h b/src/southbridge/intel/i82371eb/i82371eb_smbus.h index 54e7906223..f82f2edc73 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_smbus.h +++ b/src/southbridge/intel/i82371eb/i82371eb_smbus.h @@ -1,4 +1,5 @@ #include <device/smbus_def.h> +#include "i82371eb.h" #define SMBHST_STATUS 0x0 #define SMBHST_CTL 0x2 @@ -10,7 +11,6 @@ #define SMBUS_STATUS_MASK 0x1e #define SMBUS_ERROR_FLAG (1<<2) -void enable_smbus(void); int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address); static inline void smbus_delay(void) diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h index 585de6e3c4..bd192e019e 100644 --- a/src/southbridge/intel/i82801ax/i82801ax.h +++ b/src/southbridge/intel/i82801ax/i82801ax.h @@ -23,7 +23,12 @@ #if !defined(__PRE_RAM__) #include "chip.h" -extern void i82801ax_enable(device_t dev); +void i82801ax_enable(device_t dev); +#endif + +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); #endif #define SMBUS_IO_BASE 0x0f00 diff --git a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c index d30ed57e07..dca3a28eec 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c +++ b/src/southbridge/intel/i82801ax/i82801ax_early_smbus.c @@ -28,8 +28,6 @@ #include "i82801ax.h" #include "i82801ax_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801ax/i82801ax_smbus.h b/src/southbridge/intel/i82801ax/i82801ax_smbus.h index bf7a479a49..26893a76d9 100644 --- a/src/southbridge/intel/i82801ax/i82801ax_smbus.h +++ b/src/southbridge/intel/i82801ax/i82801ax_smbus.h @@ -19,8 +19,8 @@ */ #include <device/smbus_def.h> +#include "i82801ax.h" -void enable_smbus(void); int do_smbus_read_byte(u16 smbus_io_base, u8 device, u8 address); static void smbus_delay(void) diff --git a/src/southbridge/intel/i82801bx/i82801bx.h b/src/southbridge/intel/i82801bx/i82801bx.h index eae6de6d86..090cddfbae 100644 --- a/src/southbridge/intel/i82801bx/i82801bx.h +++ b/src/southbridge/intel/i82801bx/i82801bx.h @@ -26,6 +26,11 @@ extern void i82801bx_enable(device_t dev); #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) +void enable_smbus(void); +int smbus_read_byte(u8 device, u8 address); +#endif + #define SMBUS_IO_BASE 0x0f00 #define PMBASE_ADDR 0x0400 #define GPIO_BASE_ADDR 0x0500 diff --git a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c index 92a5403edd..6a2097ea14 100644 --- a/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c +++ b/src/southbridge/intel/i82801bx/i82801bx_early_smbus.c @@ -28,8 +28,6 @@ #include "i82801bx.h" #include "i82801bx_smbus.h" -int smbus_read_byte(u8 device, u8 address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801bx/i82801bx_smbus.h b/src/southbridge/intel/i82801bx/i82801bx_smbus.h index 066feade07..c04e9dc8d3 100644 --- a/src/southbridge/intel/i82801bx/i82801bx_smbus.h +++ b/src/southbridge/intel/i82801bx/i82801bx_smbus.h @@ -20,8 +20,6 @@ #include <device/smbus_def.h> -void enable_smbus(void); - static void smbus_delay(void) { inb(0x80); diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h index f6a54e94d5..37bcf572b9 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.h +++ b/src/southbridge/intel/i82801gx/i82801gx.h @@ -46,6 +46,11 @@ extern void i82801gx_enable(device_t dev); void i82801gx_enable_usbdebug(unsigned int port); #endif +#if defined(__PRE_RAM__) && !defined(__ROMCC__) && !defined(ASSEMBLY) +void enable_smbus(void); +int smbus_read_byte(unsigned device, unsigned address); +#endif + #define MAINBOARD_POWER_OFF 0 #define MAINBOARD_POWER_ON 1 #define MAINBOARD_POWER_KEEP 2 diff --git a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c index 658b483165..0298cc94cd 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c +++ b/src/southbridge/intel/i82801gx/i82801gx_early_smbus.c @@ -26,8 +26,6 @@ #include "i82801gx.h" #include "i82801gx_smbus.h" -int smbus_read_byte(unsigned device, unsigned address); - void enable_smbus(void) { device_t dev; diff --git a/src/southbridge/intel/i82801gx/i82801gx_smbus.h b/src/southbridge/intel/i82801gx/i82801gx_smbus.h index d1aaf5b517..a03e4cd957 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_smbus.h +++ b/src/southbridge/intel/i82801gx/i82801gx_smbus.h @@ -19,8 +19,7 @@ */ #include <device/smbus_def.h> - -void enable_smbus(void); +#include "i82801gx.h" static void smbus_delay(void) { |