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| -rw-r--r-- | targets/jetway/j7f24/Config.lb | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/targets/jetway/j7f24/Config.lb b/targets/jetway/j7f24/Config.lb new file mode 100644 index 0000000000..268873d07a --- /dev/null +++ b/targets/jetway/j7f24/Config.lb @@ -0,0 +1,45 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2008 VIA Technologies, Inc. +## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA) +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; either version 2 of the License, or +## (at your option) any later version. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +target jetway-j7f24 +mainboard jetway/j7f24 + +option MAXIMUM_CONSOLE_LOGLEVEL=8 +option DEFAULT_CONSOLE_LOGLEVEL=8 +option CONFIG_CONSOLE_SERIAL8250=1 + +# coreboot C code runs at this location in RAM +option _RAMBASE=0x00004000 + +# +# If space is allotted for a VGA BIOS, +# generate the final ROM like this: +# cat vgabios bochsbios coreboot.rom > coreboot.rom.final +# +#option ROM_SIZE = (512 * 1024) - (63 * 1024) - (64 * 1024) +option ROM_SIZE = (512 * 1024) + +romimage "image" + option COREBOOT_EXTRA_VERSION = "-j7f24" + payload ../payload.elf +end + +buildrom ./coreboot.rom ROM_SIZE "image" |