diff options
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/jasperlake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 3177a45902..25f456b6ac 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -321,7 +321,7 @@ config VBT_DATA_SIZE_KB default 9 # Clock divider parameters for 115200 baud rate -# Baudrate = (UART source clcok * M) /(N *16) +# Baudrate = (UART source clock * M) /(N *16) # ADL UART source clock: 120MHz config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL hex diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index c3eddb77b2..074c1c7eab 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -167,7 +167,7 @@ config CONSOLE_UART_BASE_ADDRESS depends on INTEL_LPSS_UART_FOR_CONSOLE # Clock divider parameters for 115200 baud rate -# Baudrate = (UART source clcok * M) /(N *16) +# Baudrate = (UART source clock * M) /(N *16) # JSL UART source clock: 100MHz config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL hex diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index d0e2c3c2ee..a447f2a521 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -111,7 +111,7 @@ config CONSOLE_UART_BASE_ADDRESS depends on INTEL_LPSS_UART_FOR_CONSOLE # Clock divider parameters for 115200 baud rate -# Baudrate = (UART source clcok * M) /(N *16) +# Baudrate = (UART source clock * M) /(N *16) # MTL UART source clock: 120MHz config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL hex diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index fc77cdef6a..0bf5beefb7 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -215,7 +215,7 @@ config CONSOLE_UART_BASE_ADDRESS depends on INTEL_LPSS_UART_FOR_CONSOLE # Clock divider parameters for 115200 baud rate -# Baudrate = (UART source clcok * M) /(N *16) +# Baudrate = (UART source clock * M) /(N *16) # TGL UART source clock: 120MHz config SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL hex |