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-rw-r--r--src/console/Makefile.inc1
-rw-r--r--src/ec/google/chromeec/Makefile.inc2
-rw-r--r--src/lib/Makefile.inc1
-rw-r--r--src/mainboard/google/chell/Makefile.inc6
-rw-r--r--src/mainboard/google/chell/bootblock_mainboard.c (renamed from src/mainboard/google/chell/car.c)6
-rw-r--r--src/mainboard/google/glados/Makefile.inc6
-rw-r--r--src/mainboard/google/glados/bootblock_mainboard.c (renamed from src/mainboard/google/glados/car.c)6
-rw-r--r--src/mainboard/google/lars/Makefile.inc6
-rw-r--r--src/mainboard/google/lars/bootblock_mainboard.c (renamed from src/mainboard/google/lars/car.c)6
-rw-r--r--src/mainboard/intel/kunimitsu/Makefile.inc6
-rw-r--r--src/mainboard/intel/kunimitsu/bootblock_mainboard.c (renamed from src/mainboard/intel/kunimitsu/car.c)6
11 files changed, 28 insertions, 24 deletions
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 0fee12aa48..68afb8a18f 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -25,4 +25,5 @@ postcar-y += die.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c printk.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += init.c console.c
+bootblock-y += post.c
bootblock-y += die.c
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index c4b9c1ad12..aeb950f5ed 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -1,6 +1,8 @@
ifeq ($(CONFIG_EC_GOOGLE_CHROMEEC),y)
+bootblock-y += ec.c
bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c
+bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_MEC) += ec_mec.c
ramstage-y += ec.c crosec_proto.c vstore.c
ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C) += ec_i2c.c
ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 24116e923c..5f708a6d3c 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -201,6 +201,7 @@ $(call src-to-obj,smm,$(dir)/fmap.c) : $(obj)/fmap_config.h
$(call src-to-obj,verstage,$(dir)/fmap.c) : $(obj)/fmap_config.h
$(call src-to-obj,postcar,$(dir)/fmap.c) : $(obj)/fmap_config.h
+bootblock-y += bootmode.c
romstage-y += bootmode.c
ramstage-y += bootmode.c
verstage-y += bootmode.c
diff --git a/src/mainboard/google/chell/Makefile.inc b/src/mainboard/google/chell/Makefile.inc
index c0ca567339..e52eb7edac 100644
--- a/src/mainboard/google/chell/Makefile.inc
+++ b/src/mainboard/google/chell/Makefile.inc
@@ -15,10 +15,12 @@
subdirs-y += spd
+bootblock-y += bootblock_mainboard.c
+
romstage-y += boardid.c
-romstage-y += car.c
romstage-y += pei_data.c
+bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -31,5 +33,3 @@ ramstage-y += pei_data.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/google/chell/car.c b/src/mainboard/google/chell/bootblock_mainboard.c
index 7791b92980..d514622442 100644
--- a/src/mainboard/google/chell/car.c
+++ b/src/mainboard/google/chell/bootblock_mainboard.c
@@ -13,20 +13,20 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <ec/google/chromeec/ec.h>
-#include <fsp/car.h>
#include <soc/gpio.h>
#include "gpio.h"
static void early_config_gpio(void)
{
/* This is a hack for FSP because it does things in MemoryInit()
- * which it shouldn't be. We have to prepare certain gpios here
+ * which it shouldn't do. We have to prepare certain gpios here
* because of the brokenness in FSP. */
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
-void car_mainboard_post_console_init(void)
+void bootblock_mainboard_init(void)
{
/* Ensure the EC and PD are in the right mode for recovery */
google_chromeec_early_init();
diff --git a/src/mainboard/google/glados/Makefile.inc b/src/mainboard/google/glados/Makefile.inc
index c0ca567339..e52eb7edac 100644
--- a/src/mainboard/google/glados/Makefile.inc
+++ b/src/mainboard/google/glados/Makefile.inc
@@ -15,10 +15,12 @@
subdirs-y += spd
+bootblock-y += bootblock_mainboard.c
+
romstage-y += boardid.c
-romstage-y += car.c
romstage-y += pei_data.c
+bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -31,5 +33,3 @@ ramstage-y += pei_data.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/google/glados/car.c b/src/mainboard/google/glados/bootblock_mainboard.c
index 7791b92980..d514622442 100644
--- a/src/mainboard/google/glados/car.c
+++ b/src/mainboard/google/glados/bootblock_mainboard.c
@@ -13,20 +13,20 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <ec/google/chromeec/ec.h>
-#include <fsp/car.h>
#include <soc/gpio.h>
#include "gpio.h"
static void early_config_gpio(void)
{
/* This is a hack for FSP because it does things in MemoryInit()
- * which it shouldn't be. We have to prepare certain gpios here
+ * which it shouldn't do. We have to prepare certain gpios here
* because of the brokenness in FSP. */
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
-void car_mainboard_post_console_init(void)
+void bootblock_mainboard_init(void)
{
/* Ensure the EC and PD are in the right mode for recovery */
google_chromeec_early_init();
diff --git a/src/mainboard/google/lars/Makefile.inc b/src/mainboard/google/lars/Makefile.inc
index 4bf6e0ab41..cafa12ca60 100644
--- a/src/mainboard/google/lars/Makefile.inc
+++ b/src/mainboard/google/lars/Makefile.inc
@@ -16,10 +16,12 @@
subdirs-y += spd
+bootblock-y += bootblock_mainboard.c
+
romstage-y += boardid.c
-romstage-y += car.c
romstage-y += pei_data.c
+bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -32,5 +34,3 @@ ramstage-y += pei_data.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/google/lars/car.c b/src/mainboard/google/lars/bootblock_mainboard.c
index 7791b92980..d514622442 100644
--- a/src/mainboard/google/lars/car.c
+++ b/src/mainboard/google/lars/bootblock_mainboard.c
@@ -13,20 +13,20 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <ec/google/chromeec/ec.h>
-#include <fsp/car.h>
#include <soc/gpio.h>
#include "gpio.h"
static void early_config_gpio(void)
{
/* This is a hack for FSP because it does things in MemoryInit()
- * which it shouldn't be. We have to prepare certain gpios here
+ * which it shouldn't do. We have to prepare certain gpios here
* because of the brokenness in FSP. */
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
-void car_mainboard_post_console_init(void)
+void bootblock_mainboard_init(void)
{
/* Ensure the EC and PD are in the right mode for recovery */
google_chromeec_early_init();
diff --git a/src/mainboard/intel/kunimitsu/Makefile.inc b/src/mainboard/intel/kunimitsu/Makefile.inc
index 4bf6e0ab41..cafa12ca60 100644
--- a/src/mainboard/intel/kunimitsu/Makefile.inc
+++ b/src/mainboard/intel/kunimitsu/Makefile.inc
@@ -16,10 +16,12 @@
subdirs-y += spd
+bootblock-y += bootblock_mainboard.c
+
romstage-y += boardid.c
-romstage-y += car.c
romstage-y += pei_data.c
+bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
@@ -32,5 +34,3 @@ ramstage-y += pei_data.c
ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
-
-verstage-y += car.c
diff --git a/src/mainboard/intel/kunimitsu/car.c b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
index 7791b92980..d514622442 100644
--- a/src/mainboard/intel/kunimitsu/car.c
+++ b/src/mainboard/intel/kunimitsu/bootblock_mainboard.c
@@ -13,20 +13,20 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <ec/google/chromeec/ec.h>
-#include <fsp/car.h>
#include <soc/gpio.h>
#include "gpio.h"
static void early_config_gpio(void)
{
/* This is a hack for FSP because it does things in MemoryInit()
- * which it shouldn't be. We have to prepare certain gpios here
+ * which it shouldn't do. We have to prepare certain gpios here
* because of the brokenness in FSP. */
gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
}
-void car_mainboard_post_console_init(void)
+void bootblock_mainboard_init(void)
{
/* Ensure the EC and PD are in the right mode for recovery */
google_chromeec_early_init();
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 23:38:02 +0000