diff options
| -rw-r--r-- | src/northbridge/intel/haswell/gma.c | 41 | ||||
| -rw-r--r-- | src/northbridge/intel/haswell/haswell.h | 1 |
2 files changed, 0 insertions, 42 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 989d100585..9627945412 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -120,47 +120,6 @@ u32 map_oprom_vendev(u32 vendev) return new_vendev; } -/** FIXME: Seems to be outdated. */ -/* - * GTT is the Global Translation Table for the graphics pipeline. It is used to translate - * graphics addresses to physical memory addresses. As in the CPU, GTTs map 4K pages. - * - * The setgtt function adds a further bit of flexibility: it allows you to set a range (the - * first two parameters) to point to a physical address (third parameter); the physical address - * is incremented by a count (fourth parameter) for each GTT in the range. - * - * Why do it this way? For ultrafast startup, we can point all the GTT entries to point to one - * page, and set that page to 0s: - * - * memset(physbase, 0, 4096); - * setgtt(0, 4250, physbase, 0); - * - * this takes about 2 ms, and is a win because zeroing the page takes up to 200 ms. - * - * This call sets the GTT to point to a linear range of pages starting at physbase. - */ - -#define GTT_PTE_BASE (2 << 20) - -void set_translation_table(int start, int end, u64 base, int inc) -{ - int i; - - for (i = start; i < end; i++){ - u64 physical_address = base + i * inc; - - /* swizzle the 32:39 bits to 4:11 */ - u32 word = physical_address | ((physical_address >> 28) & 0xff0) | 1; - - /* - * Note: we've confirmed by checking the values that MRC does no useful - * setup before we run this. - */ - gtt_write(GTT_PTE_BASE + i * 4, word); - gtt_read(GTT_PTE_BASE + i * 4); - } -} - static struct resource *gtt_res = NULL; u32 gtt_read(u32 reg) diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index b160f83876..edca2b6330 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -90,7 +90,6 @@ void mb_late_romstage_setup(void); /* optional */ void haswell_early_initialization(void); void haswell_late_initialization(void); -void set_translation_table(int start, int end, u64 base, int inc); void haswell_unhide_peg(void); void report_platform_info(void); |