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authorStefan Reinauer <stepan@coresystems.de>2008-07-19 14:42:21 +0000
committerStefan Reinauer <stepan@openbios.org>2008-07-19 14:42:21 +0000
commita3f057935c8a4929a76f54e8d30900eb2a6e9a0a (patch)
tree68325f49697afa3a82eeb1fc817ddb1542d088d5 /util/superiotool
parenta12eb6a7e5154047cee12f9a7e70bf7947cfadaa (diff)
superiotool: add support for SMSC SIO10N268 (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/superiotool')
-rw-r--r--util/superiotool/smsc.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c
index 000c05d419..ae7397f676 100644
--- a/util/superiotool/smsc.c
+++ b/util/superiotool/smsc.c
@@ -2,6 +2,7 @@
* This file is part of the superiotool project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2008 coresystems GmbH <info@coresystems.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -558,6 +559,28 @@ static const struct superio_registers reg_table[] = {
0x00,0x80,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,EOT}},
{EOT}}},
+ {0x5b, "SIO10N268", {
+ /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */
+ {NOLDN, NULL,
+ {0x00,0x01,0x03,0x04,0x04,0x05,0x06,0x07,0x08,0x09,
+ 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
+ 0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
+ 0x1e,0x1f,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,
+ 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,
+ 0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,
+ 0x3c,0x3d,0x3e,0x3f,0x40,0x41,0x42,0x43,0x44,0x45,
+ 0x46,0x47,0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,
+ 0x50,0x51,0x52,0x53,0x54,EOT},
+ {0x20,0x98,0x00,0x70,0x00,0x00,0xff,0x00,0x00,0x00,
+ 0x00,0x00,0x02,0x5b,NANA,0x00,0x00,0x00,MISC,0x00,
+ NANA,NANA,NANA,0x03,0x00,NANA,NANA,0x00,0x00,0x00,
+ NANA,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0xff,0x00,
+ 0x00,0x80,0x00,0x00,0x0f,0x03,0x00,0x00,0x00,NANA,
+ NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x00,
+ 0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,0x50,
+ NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x01,
+ 0x00,0x01,0x00,0x8c,MISC,EOT}},
+ {EOT}}},
{0x65, "FDC37C665GT/IR", {
/* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */
/* Chiprev: 0x02 = FDC37C665GT, 0x82 = FDC37C665IR */