util/spd_tools: Add Cezanne support to lp4x/gen_spd.go

To supply memory information for Guybrush, the lpddr4x script for
generating SPDs needs to be updated for Cezanne.

BUG=b:178722935
TEST=Add the part used on Majolica to the global lpddr4x json file
and verify that the output is similar to the actual SPD used for
Majolica.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I1f522cb4a92b4fe4c26cad0689437c33ec44befe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51015
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 13 insertions, 4 deletions

diff --git a/util/spd_tools/lp4x/gen_spd.go b/util/spd_tools/lp4x/gen_spd.go
index 2575b5d436..6f4f8955a5 100644
--- a/util/spd_tools/lp4x/gen_spd.go
+++ b/util/spd_tools/lp4x/gen_spd.go
@@ -29,12 +29,14 @@ const (
 
 	PlatformTGLADL = 0
 	PlatformJSL = 1
+	PlatformCZN    = 2
 )
 
 var platformMap = map[string]int {
 	"TGL": PlatformTGLADL,
 	"JSL": PlatformJSL,
 	"ADL": PlatformTGLADL,
+	"CZN": PlatformCZN,
 }
 
 var currPlatform int
@@ -217,7 +219,7 @@ func getMRCDensity(memAttribs *memAttributes) int {
 		 * SPDIndexDensityBanks. Logical channel on TGL is an x16 channel.
 		 */
 		return memAttribs.DensityPerChannelGb * TGLLogicalChannelWidth / memAttribs.BitWidthPerChannel
-	} else if currPlatform == PlatformJSL {
+	} else if currPlatform == PlatformJSL || currPlatform == PlatformCZN {
 		/*
 		 * Intel MRC on JSL expects density per die to be encoded in
 		 * SPDIndexDensityBanks.
@@ -269,13 +271,16 @@ func encodePackage(dies int) byte {
 	return temp << 7
 }
 
+/* Per JESD209-4C Dies = ZQ balls on the package */
+/* Note that this can be different than the part's die count */
 func encodeDiesPerPackage(memAttribs *memAttributes) byte {
 	var dies int = 0
 	if currPlatform == PlatformTGLADL {
 		/* Intel MRC expects logical dies to be encoded for TGL. */
 		dies = memAttribs.ChannelsPerDie * memAttribs.RanksPerChannel * memAttribs.BitWidthPerChannel / 16
-	} else if currPlatform == PlatformJSL {
+	} else if currPlatform == PlatformJSL || currPlatform == PlatformCZN {
 		/* Intel MRC expects physical dies to be encoded for JSL. */
+		/* AMD PSP expects physical dies (ZQ balls) */
 		dies = memAttribs.DiesPerPackage
 	}
 
@@ -333,7 +338,7 @@ const (
 func encodeBusWidth(memAttribs *memAttributes) byte {
 	if currPlatform == PlatformTGLADL {
 		return SPDValueBusWidthTGL
-	} else if currPlatform == PlatformJSL {
+	} else if currPlatform == PlatformJSL || currPlatform == PlatformCZN {
 		return SPDValueBusWidthJSL
 	}
 	return 0
@@ -941,7 +946,11 @@ func usage() {
 	fmt.Printf("   where,\n")
 	fmt.Printf("   spd_dir = Directory path containing SPD files and manifest generated by gen_spd.go\n")
 	fmt.Printf("   mem_parts_list_json = JSON File containing list of memory parts and attributes\n")
-	fmt.Printf("   platform = SoC Platform for which the SPDs are being generated\n\n\n")
+	fmt.Printf("   platform = SoC Platform for which the SPDs are being generated\n")
+	fmt.Printf("              supported platforms: ")
+	keys := reflect.ValueOf(platformMap).MapKeys()
+	fmt.Println(keys)
+	fmt.Printf("\n\n\n")
 }
 
 func main() {