diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2023-10-20 14:41:27 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-23 12:33:17 +0000 |
| commit | 57e36a3320837729b6b20b0c4e44572898d0860f (patch) | |
| tree | cf1a410bab1a927b3d57fbeede5d4cc967722764 /util/rockchip | |
| parent | 93791db23e475b3b5ab1175fc6d50418df937ad7 (diff) | |
cpu/intel/model_206ax: Program Ivy Bridge defaults for MSR_PKGC_IRTL
Ivy Bridge has lower latencies than Sandy Bridge has. Update MSRs
MSR_PKGC_IRTL with values from BWG.
Test: Lenovo X220 still boots.
Change-Id: Ib307e3b191ba68e016cc348f82e2dccf1dc9ae16
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78609
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'util/rockchip')
0 files changed, 0 insertions, 0 deletions