diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-01-29 19:24:29 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-01-30 14:38:53 +0000 |
| commit | 349b64f37aae4fed66045317bbc6e1c35c7bff86 (patch) | |
| tree | 72d714b61b6e66826b49dce2abe955b041e8223d /util/riscv | |
| parent | 0b53d8b883684a68b1e218f6c6ddb2a9d302558c (diff) | |
soc/intel/common/block: Create PCIE related macros
Add generic PCIE RP related macros for SoC layer to use.
Change-Id: I84d02daded5cfe11120f099dc80c00ac0ec795f1
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/riscv')
0 files changed, 0 insertions, 0 deletions