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authorzbao <fishbaozi@gmail.com>2012-04-12 11:27:26 +0800
committerMarc Jones <marcj303@gmail.com>2012-04-19 01:04:45 +0200
commit585a4006976e903599b7128200a29b5729777818 (patch)
tree871b49d511410fb91988de66ba284b05defd665c /util/nvramtool/reg_expr.c
parent3f788e1f701ffb65f6f1bf62c91ac0d6fc013fb4 (diff)
Leverage the Pstate table created by AGESA.
The name of processor created by AGESA is P00n, whose P is BLDCFG_PROCESSOR_SCOPE_NAME(is 'C' if it is undefined.) and n starts from 0. The dsdt should be aligned with that. This feature has only been tested on persimmon. The changes on all the other boards were propagated. Change-Id: I8c3fa4b94406d530d2bed8e9a1f42b433bbec3ec Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/884 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'util/nvramtool/reg_expr.c')
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