summaryrefslogtreecommitdiff
path: root/util/msrtool/intel_pentium3.c
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-08-03 12:29:41 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-04 21:43:45 +0000
commit96a80133e17c238d9f1566ea2cdc545445920968 (patch)
treee67bb10e3d8f492370ceace5acebbfa504284c50 /util/msrtool/intel_pentium3.c
parent37799b34395254d02a68d00d6ab4a77ce6bc5341 (diff)
soc/intel/skylake: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says: BIOS implementations must report these remapping structure types in numerical order. i.e., All remapping structures of type 0 (DRHD) enumerated before remapping structures of type 1 (RMRR), and so forth. So, update the corresponding code to adhere to the specification. Change-Id: I2446d536603559f637f3f8b1b44e9d712aa35492 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'util/msrtool/intel_pentium3.c')
0 files changed, 0 insertions, 0 deletions