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| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-10-31 09:13:26 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-11-01 14:27:02 +0100 |
| commit | f6dc5443185ea07fd305426a67a1b0aa57003d96 (patch) | |
| tree | f4927912f5e5d81a161b89d60e9bb19809d09e0d /util/msrtool/intel_core2_later.c | |
| parent | 5ab5a39d2ed0ea28347218ad5e129a7c8244012c (diff) | |
abuild: allow specifying multiple targets by mainboard descriptor
abuild -t EMULATION_QEMU_UCB_RISCV,EMULATION_SPIKE_UCB_RISCV works now
Change-Id: I49d8cd86e21ede724d8daa441b728efa1f6ea1fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12281
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'util/msrtool/intel_core2_later.c')
0 files changed, 0 insertions, 0 deletions