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authorMartin Roth <martinroth@google.com>2018-02-08 19:52:20 -0700
committerMartin Roth <martinroth@google.com>2018-02-10 23:49:42 +0000
commitba39770f2e41918c14da3dddab4d119d996d4eec (patch)
treec08af8bbc3029b46016b47f1a4ff54ad026a451b /util/msrtool/intel_core2_later.c
parent2db6fbc47b1070a40f5c9b00f6ac9957ca8a4199 (diff)
soc/amd/stoneyridge: Put outl arguments in correct order
outl takes value then port. BUG=b:72130849 Test=None Change-Id: I010c8a4462e6e27f3d335b95305dfdb137453869 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/23665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'util/msrtool/intel_core2_later.c')
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