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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2018-11-09 10:25:15 +0100 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2018-11-12 07:27:10 +0000 |
| commit | 3a499725f0fded9cba9b76816f469138149e00f8 (patch) | |
| tree | f04093f2afe3e419b991050254923169058a67b8 /util/me_cleaner/setup.py | |
| parent | fe7367801c3f6f0f876c6258aa924c085e19ed89 (diff) | |
siemens/mc_apl4: Enable all PCIe root ports
Enable all PCIe root ports for this mainboard.
Change-Id: I7f6feb2f0d4c45f32d9454838e67e1a244b2712b
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/29559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'util/me_cleaner/setup.py')
0 files changed, 0 insertions, 0 deletions