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authorMichael Niewöhner <foss@mniewoehner.de>2020-12-21 17:09:08 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2021-01-21 18:13:39 +0000
commitfccc24f063acb2470ba919237b0056c6afecd4d9 (patch)
tree79d7f97132735648da94be1eaa827ebf33ab7182 /util/marvell/doimage_mv/doimage.c
parentf31c2f2b7a27fbb2d8a26125f3d1852c821ea0b7 (diff)
mb/intel/glkrvp: do LPC/eSPI pad configuration at board-level
Do LPC/eSPI pad configuration at board-level to match other platforms. This is done by adding one missing pad to the early gpio table and dropping the call to the soc function. The soc code gets dropped in CB:49410. Change-Id: I210633d4520fcfab59f68268bd7991557433ce38 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49415 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/marvell/doimage_mv/doimage.c')
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