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authorZheng Bao <fishbaozi@gmail.com>2023-05-23 13:56:52 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-06-12 15:28:09 +0000
commit97ed78f64729400b87045c828d228b1e76a2ac50 (patch)
treeb7ca34e2b0b4ae68a752a67d228b2d51de08f117 /util/inteltool/gpio_groups.c
parente06d786d0b64a96ab7c20d0b3871df38d1d451e1 (diff)
soc/amd/smm: Sanity check the SMM TSEG size
As per AMD64 Architecture Programmer's Manual, section 10.2.5 SMRAM Protected Areas: The TSEG range must be aligned to a 128 Kbyte boundary and the minimum TSEG size is 128 Kbytes. The SMM TSEG size should be less than SMM reserved size. AMD TSEG mask works like an MTRR. It needs to be aligned to it's size and it's size needs to be a power of 2. Change-Id: Ic4f557c7b77db6fc5ab2783ca4e2ebe7a4476e85 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75405 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Himanshu Sahdev <himanshu.sahdev@intel.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'util/inteltool/gpio_groups.c')
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