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authorFelix Held <felix-coreboot@felixheld.de>2021-02-02 16:15:17 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-02-03 19:59:54 +0000
commit70f1af8934db9ca840eff994f93ae3aaa096bf84 (patch)
treea6a911b58ff2d973a305288ea86cfee6198080cf /util/fuzz-tests/jpeg-test-cases/coreboot.jpg
parent4c4a360018315b3bd60d3cfc3506137a631ee7ba (diff)
soc/amd/cezanne: remove UART2/3 AOAC device offsets
UART2 and UART3 don't exist on Cezanne which now has been verified, so remove the corresponding AOAC offsets. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I67755bd34df3a835cc39929bdc24f711d158b3a3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'util/fuzz-tests/jpeg-test-cases/coreboot.jpg')
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