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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-09 16:12:51 -0600 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-15 13:51:32 +0000 |
commit | f55e82c3939cee1fc4ac877a3a84c323268ec555 (patch) | |
tree | d93cd021d515ceb63bae2599ddba31e10751da2e /util/crossgcc | |
parent | 90b1dc189112679cf808a942f6f860ce9a074c77 (diff) |
mb/google/brya: Add support for romstage GPIO table
Some variants may require more complex power sequencing than can be
accomodated with just 2 GPIO tables, therefore introduce one in romstage
as well.
BUG=b:187691798
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I7a63a2ee2cd036b9ae5822be9c87d8a026a54922
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57539
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Diffstat (limited to 'util/crossgcc')
0 files changed, 0 insertions, 0 deletions