summaryrefslogtreecommitdiff
path: root/util/crossgcc/Makefile
diff options
context:
space:
mode:
authorKarthikeyan Ramasubramanian <kramasub@chromium.org>2019-03-20 11:38:01 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-03-28 06:39:38 +0000
commitcc7cdb19b10fa9b51acf8bc0fa94d202ffa214f3 (patch)
tree37efa9429117e94b7a27b25117a4f7bb084cd034 /util/crossgcc/Makefile
parente2ac5b7a36cd0583a6b62dac4f8dae5529f44b74 (diff)
soc/intel/common: Move support to log XHCI wake events
The policy to identify and log the XHCI wake events is similar between skylake and apollolake. Hence move the similar parts to a common location. BUG=b:123429132 BRANCH=None TEST=Ensure that the system boots to ChromeOS. Ensure that the wake up events due to USB are logged into the event logs. 6 | 2019-03-21 09:22:18 | S0ix Enter 7 | 2019-03-21 09:22:22 | S0ix Exit 8 | 2019-03-21 09:22:22 | Wake Source | PME - XHCI (USB 2.0 port) | 9 9 | 2019-03-21 09:22:22 | Wake Source | GPE # | 13 10 | 2019-03-21 09:23:20 | ACPI Enter | S3 11 | 2019-03-21 09:23:30 | Wake Source | PME - XHCI (USB 2.0 port) | 9 12 | 2019-03-21 09:23:30 | ACPI Wake | S3 13 | 2019-03-21 09:23:30 | Wake Source | GPE # | 13 Change-Id: Ia6643342e3292984e422ff3c3fcd4bc0d99f947e Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'util/crossgcc/Makefile')
0 files changed, 0 insertions, 0 deletions