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author | Arthur Heymans <arthur@aheymans.xyz> | 2021-09-07 14:16:50 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-09-23 06:38:52 +0000 |
commit | ffa61b0f60d8e988a72ea8d2777b9efa6c35d304 (patch) | |
tree | 72d69dd44f2e7c987263dc4b9d51c1b9a1aaebd2 /util/bincfg | |
parent | a767a148783cea4dad1bf1a4b826debd30c0252e (diff) |
soc/intel/xeon_sp/cpx: Use FSP repo
Some headers in vendorcode are still needed but the UPD definitions
can be taken from the FSP repo.
Change-Id: I7bb96649ecba9d313cfce50af202aabcf610680f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57457
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'util/bincfg')
0 files changed, 0 insertions, 0 deletions